Driver: Add clang -cc1 -mrelax-all option, which sets relaxes all instructions when using -integrated-as.

llvm-svn: 104807

2 files changed, 6 insertions, 0 deletions

diff --git a/clang/lib/Frontend/CodeGenAction.cpp b/clang/lib/Frontend/CodeGenAction.cpp
index 03e3ea605cc..3416aa825fc 100644
--- a/clang/lib/Frontend/CodeGenAction.cpp
+++ b/clang/lib/Frontend/CodeGenAction.cpp
@@ -321,6 +321,9 @@ bool BackendConsumer::AddEmitPasses() {
   }
   TargetMachine *TM = TheTarget->createTargetMachine(Triple, FeaturesStr);
 
+  if (CodeGenOpts.RelaxAll)
+    TM->setMCRelaxAll(true);
+
   // Set register scheduler & allocation policy.
   RegisterScheduler::setDefault(createDefaultScheduler);
   RegisterRegAlloc::setDefault(Fast ? createLocalRegisterAllocator :
diff --git a/clang/lib/Frontend/CompilerInvocation.cpp b/clang/lib/Frontend/CompilerInvocation.cpp
index 2b75b64dc7d..1d81e82ca37 100644
--- a/clang/lib/Frontend/CompilerInvocation.cpp
+++ b/clang/lib/Frontend/CompilerInvocation.cpp
@@ -187,6 +187,8 @@ static void CodeGenOptsToArgs(const CodeGenOptions &Opts,
     Res.push_back("-fobjc-dispatch-method=non-legacy");
     break;
   }
+  if (Opts.RelaxAll)
+    Res.push_back("-mrelax-all");
   if (Opts.SoftFloat)
     Res.push_back("-msoft-float");
   if (Opts.UnwindTables)
@@ -815,6 +817,7 @@ static void ParseCodeGenArgs(CodeGenOptions &Opts, ArgList &Args,
   Opts.FloatABI = Args.getLastArgValue(OPT_mfloat_abi);
   Opts.LimitFloatPrecision = Args.getLastArgValue(OPT_mlimit_float_precision);
   Opts.NoZeroInitializedInBSS = Args.hasArg(OPT_mno_zero_initialized_in_bss);
+  Opts.RelaxAll = Args.hasArg(OPT_mrelax_all);
   Opts.SoftFloat = Args.hasArg(OPT_msoft_float);
   Opts.UnwindTables = Args.hasArg(OPT_munwind_tables);
   Opts.RelocationModel = Args.getLastArgValue(OPT_mrelocation_model, "pic");