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authorAlex Lorenz <arphaman@gmail.com>2015-09-10 14:04:34 +0000
committerAlex Lorenz <arphaman@gmail.com>2015-09-10 14:04:34 +0000
commit0153e59935cb14302e01e5546afc00a2575ecbf8 (patch)
treeaf334c15d80c3b39bf1ca1868fa1bfd90c349f08 /clang/lib/Frontend
parent3285f1b850b736f507772b64b1a16e55fe2c1afc (diff)
downloadbcm5719-llvm-0153e59935cb14302e01e5546afc00a2575ecbf8.tar.gz
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Fix PR 24724 - The implicit register verifier shouldn't assume certain operand
order. The implicit register verifier in the MIR parser should only check if the instruction's default implicit operands are present in the instruction. It should not check the order in which they occur. llvm-svn: 247283
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