summaryrefslogtreecommitdiffstats
path: root/clang/lib/Frontend/InitPreprocessor.cpp
diff options
context:
space:
mode:
authorDaniel Sanders <daniel_l_sanders@apple.com>2017-12-04 21:40:57 +0000
committerDaniel Sanders <daniel_l_sanders@apple.com>2017-12-04 21:40:57 +0000
commit7c2cf5c5cca5456f3d1ba3fcfc7f2ad414317b8e (patch)
tree514d06150dc54e33cab29e359e45e2d9e9bc1c9e /clang/lib/Frontend/InitPreprocessor.cpp
parentc2e88a8a6b03b7cdbeef807b60f030ba10abcfa8 (diff)
downloadbcm5719-llvm-7c2cf5c5cca5456f3d1ba3fcfc7f2ad414317b8e.tar.gz
bcm5719-llvm-7c2cf5c5cca5456f3d1ba3fcfc7f2ad414317b8e.zip
Allow similar TargetOpcodes to use inheritance to factor out commonality. NFC.
Summary: While implementing atomicrmw in https://reviews.llvm.org/D40092 I found that inheritance is unusable for all the Generic Opcodes in GlobalISel. This is because the whole header is included inside a 'let mayLoad = 0, mayStore = 0 ... in' block. In TableGen, the order of precedence for field assignments is: 1. Values from classes the record inherits from. 2. Values from 'let Name=Value in { ... }' 3. Values from 'let Name=Value;' As such the 'let mayLoad = 0, mayStore = 0, ... in' surrounding the 'include "GenericOpcodes.td"' was overriding any values provided via inheritance. We hadn't noticed this before because we were only using 'let Name=Value;' to specialize opcodes. Fix this by moving the default values to the lowest precedence. This is accomplished by moving the values to a common base class (StandardPseudoInstruction for most TargetOpcodes, and GenericOpcode for GlobalISel specific TargetOpcodes) Reviewers: qcolombet Reviewed By: qcolombet Subscribers: llvm-commits, igorb Differential Revision: https://reviews.llvm.org/D40096 llvm-svn: 319701
Diffstat (limited to 'clang/lib/Frontend/InitPreprocessor.cpp')
0 files changed, 0 insertions, 0 deletions
OpenPOWER on IntegriCloud