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| author | Craig Topper <craig.topper@intel.com> | 2018-04-24 22:35:27 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@intel.com> | 2018-04-24 22:35:27 +0000 |
| commit | f3cefad255e9ff56bead504ed787379d735760fc (patch) | |
| tree | 5ab4ae9edfb10a8fa4417c936473581a1c006a21 /clang/lib/Frontend/CompilerInvocation.cpp | |
| parent | 07b0059083f2df678f0bb7d1a8f7b810bc854bdc (diff) | |
| download | bcm5719-llvm-f3cefad255e9ff56bead504ed787379d735760fc.tar.gz bcm5719-llvm-f3cefad255e9ff56bead504ed787379d735760fc.zip | |
[DAGCombiner][X86] When promoting loads don't use ZEXTLOAD even its legal
We were previously prefering ZEXTLOAD over EXTLOAD if it is legal. This triggers during X86's promotion of i16->i32. Not sure about other targets.
Using ZEXTLOAD can prevent folding it to SEXTLOAD later if we were to promote a sign extended operand like we would need for SRA. However, X86 doesn't currently promote i16 SRA. I was looking into doing that which is how I found this issue.
This is also blocking our ability to fold 4 byte aligned EXTLOADs with "loadi32". This is what caused most of the test changes here.
Differential Revision: https://reviews.llvm.org/D45585#inline-402825
llvm-svn: 330781
Diffstat (limited to 'clang/lib/Frontend/CompilerInvocation.cpp')
0 files changed, 0 insertions, 0 deletions
