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author | Nadav Rotem <nrotem@apple.com> | 2012-08-30 19:17:29 +0000 |
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committer | Nadav Rotem <nrotem@apple.com> | 2012-08-30 19:17:29 +0000 |
commit | ea973bda26d4b04b1bf6700401c7eb77b1873820 (patch) | |
tree | e5025a0df7f81c8392b06c996dd62bc3e2dbf4a2 /clang/lib/Frontend/CompilerInvocation.cpp | |
parent | aad745a024a3d0fd573ac9649d4c659e6a713702 (diff) | |
download | bcm5719-llvm-ea973bda26d4b04b1bf6700401c7eb77b1873820.tar.gz bcm5719-llvm-ea973bda26d4b04b1bf6700401c7eb77b1873820.zip |
Currently targets that do not support selects with scalar conditions and vector operands - scalarize the code. ARM is such a target
because it does not support CMOV of vectors. To implement this efficientlyi, we broadcast the condition bit and use a sequence of NAND-OR
to select between the two operands. This is the same sequence we use for targets that don't have vector BLENDs (like SSE2).
rdar://12201387
llvm-svn: 162926
Diffstat (limited to 'clang/lib/Frontend/CompilerInvocation.cpp')
0 files changed, 0 insertions, 0 deletions