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authorNadav Rotem <nrotem@apple.com>2012-08-30 19:17:29 +0000
committerNadav Rotem <nrotem@apple.com>2012-08-30 19:17:29 +0000
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parentaad745a024a3d0fd573ac9649d4c659e6a713702 (diff)
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Currently targets that do not support selects with scalar conditions and vector operands - scalarize the code. ARM is such a target
because it does not support CMOV of vectors. To implement this efficientlyi, we broadcast the condition bit and use a sequence of NAND-OR to select between the two operands. This is the same sequence we use for targets that don't have vector BLENDs (like SSE2). rdar://12201387 llvm-svn: 162926
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