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author | Craig Topper <craig.topper@intel.com> | 2017-12-29 06:39:16 +0000 |
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committer | Craig Topper <craig.topper@intel.com> | 2017-12-29 06:39:16 +0000 |
commit | d2fe244a6aa3fa0d24686d630aff7e4f1287e227 (patch) | |
tree | 06b44b5436d218d22fbd6b662864bf466ae9b5a4 /clang/lib/Frontend/CompilerInvocation.cpp | |
parent | 421b2d1d8e9a5ff56f1af6aa69a77b2e6ab39ef8 (diff) | |
download | bcm5719-llvm-d2fe244a6aa3fa0d24686d630aff7e4f1287e227.tar.gz bcm5719-llvm-d2fe244a6aa3fa0d24686d630aff7e4f1287e227.zip |
Revert r321504 "[X86] Don't accidentally enable PKU on cannon lake and icelake or CLWB on cannonlake."
I based that commit on what was in Intel's public documentation here https://software.intel.com/sites/default/files/managed/c5/15/architecture-instruction-set-extensions-programming-reference.pdf
Which specifically said CLWB wasn't until Icelake.
But I've since cross checked with SDE and it thinks these features exist on CNL and ICL. So now I don't know what to believe.
I've added test coverage of the current behavior as part of the revert so at least now have proof of what we're doing.
llvm-svn: 321547
Diffstat (limited to 'clang/lib/Frontend/CompilerInvocation.cpp')
0 files changed, 0 insertions, 0 deletions