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| author | Shiva Chen <shiva0217@gmail.com> | 2018-04-12 11:30:59 +0000 |
|---|---|---|
| committer | Shiva Chen <shiva0217@gmail.com> | 2018-04-12 11:30:59 +0000 |
| commit | b48b027d05eb28a868ffda436c4409b6b606a0cc (patch) | |
| tree | 365b3c067fe7b44dc36f84e39b448dcaa8e3f916 /clang/lib/Frontend/CompilerInvocation.cpp | |
| parent | 69e0e8e3d418a5031b082b69acb8f96adc1225dd (diff) | |
| download | bcm5719-llvm-b48b027d05eb28a868ffda436c4409b6b606a0cc.tar.gz bcm5719-llvm-b48b027d05eb28a868ffda436c4409b6b606a0cc.zip | |
[RISCV] Change function alignment to 4 bytes, and 2 bytes for RVC
Summary:
According RISC-V ELF psABI specification, base RV32 and RV64 ISAs only
allow 32-bit instruction alignment, but instruction allow to be aligned
to 16-bit boundaries for C-extension.
So we just align to 4 bytes and 2 bytes for C-extension is enough.
Reviewers: asb, apazos
Differential Revision: https://reviews.llvm.org/D45560
Patch by Kito Cheng.
llvm-svn: 329899
Diffstat (limited to 'clang/lib/Frontend/CompilerInvocation.cpp')
0 files changed, 0 insertions, 0 deletions
