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authorOliver Stannard <oliver.stannard@arm.com>2016-10-11 10:06:59 +0000
committerOliver Stannard <oliver.stannard@arm.com>2016-10-11 10:06:59 +0000
commit50a74393c2c49ccf726977e84ce52c66d43fc010 (patch)
treeeb3ac77bc35e99e7025d624f114623e66f46f410 /clang/lib/Frontend/CompilerInvocation.cpp
parentf1560799214e5dbf38d6c01e3fea8bbfc818dcba (diff)
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[ARM] Fix registers clobbered by SjLj EH on soft-float targets
Currently, the Int_eh_sjlj_dispatchsetup intrinsic is marked as clobbering all registers, including floating-point registers that may not be present on the target. This is technically true, as we could get linked against code that does use the FP registers, but that will not actually work, as the soft-float code cannot save and restore the FP registers. SjLj exception handling can only work correctly if either all or none of the code is built for a target with FP registers. Therefore, we can assume that, when Int_eh_sjlj_dispatchsetup is compiled for a soft-float target, it is only going to be linked against other soft-float code, and so only clobbers the general-purpose registers. This allows us to check that no non-savable registers are clobbered when generating the prologue/epilogue. Differential Revision: https://reviews.llvm.org/D25180 llvm-svn: 283866
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