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authorDaniel Sanders <daniel_l_sanders@apple.com>2017-11-28 23:18:54 +0000
committerDaniel Sanders <daniel_l_sanders@apple.com>2017-11-28 23:18:54 +0000
commit40c5cbfb0885f1dd61994ab18959c2846fd74e44 (patch)
tree6ee96527ead188961207a65b1e2507ef356dd67d /clang/lib/Frontend/CompilerInvocation.cpp
parentac8a9a005e32cb951f47caec499afe01985ad2fd (diff)
downloadbcm5719-llvm-40c5cbfb0885f1dd61994ab18959c2846fd74e44.tar.gz
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[globalisel][tablegen] Fix PR35375 by sign-extending the table value to match getConstantVRegVal()
Summary: From the bug report: > The problem is that it fails when trying to compare -65536 (or 4294901760) to 0xFFFF,0000. This is because the > constant in the instruction is sign extended to 64 bits (0xFFFF,FFFF,FFFF,0000) and then compared to the non > extended 64 bit version expected by TableGen. > > In contrast, the DAGISelEmitter generates special code for AND immediates (OPC_CheckAndImm), which does not > sign extend. This patch doesn't introduce the special case for AND (and OR) immediates since the majority of it is related to handling known bits that have no effect on the result and GlobalISel doesn't detect known-bits at this time. Instead this patch just ensures that the immediate is extended consistently on both sides of the check. Thanks to Diana Picus for the detailed bug report. Reviewers: rovka Reviewed By: rovka Subscribers: kristof.beyls, javed.absar, llvm-commits Differential Revision: https://reviews.llvm.org/D40532 llvm-svn: 319252
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