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| author | Sasa Stankovic <Sasa.Stankovic@imgtec.com> | 2014-07-14 09:40:29 +0000 |
|---|---|---|
| committer | Sasa Stankovic <Sasa.Stankovic@imgtec.com> | 2014-07-14 09:40:29 +0000 |
| commit | b976fee83c474bb8a295cf141ed0cfe3717a8fee (patch) | |
| tree | 81386ed2b92d7b340b36da568a5fabc1661a7622 /clang/lib/Frontend/CMakeLists.txt | |
| parent | 465466e80ca6aedef9c30e65fe61ff3a0cf3b7e0 (diff) | |
| download | bcm5719-llvm-b976fee83c474bb8a295cf141ed0cfe3717a8fee.tar.gz bcm5719-llvm-b976fee83c474bb8a295cf141ed0cfe3717a8fee.zip | |
[mips] Expand BuildPairF64 to a spill and reload when the O32 FPXX ABI is
enabled and mthc1 and dmtc1 are not available (e.g. on MIPS32r1)
This prevents the upper 32-bits of a double precision value from being moved to
the FPU with mtc1 to an odd-numbered FPU register. This is necessary to ensure
that the code generated executes correctly regardless of the current FPU mode.
MIPS32r2 and above continues to use mtc1/mthc1, while MIPS-IV and above continue
to use dmtc1.
Differential Revision: http://reviews.llvm.org/D4465
llvm-svn: 212930
Diffstat (limited to 'clang/lib/Frontend/CMakeLists.txt')
0 files changed, 0 insertions, 0 deletions
