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authorTobias Grosser <tobias@grosser.es>2015-09-28 13:47:50 +0000
committerTobias Grosser <tobias@grosser.es>2015-09-28 13:47:50 +0000
commit28b9a14b07f0c6b491076c0bff8ddee7beb75231 (patch)
treebe705606632b4ac3e0584510354099e730a28e56 /clang/lib/Format/TokenAnnotator.cpp
parent8ff61200f4382d9fda57773aec48f1bd3166a22b (diff)
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BlockGenerator: Generate synthesisable instructions only on-demand
Instructions which we can synthesis from a SCEV expression are not generated directly, but only when they are used as an operand of another instruction. This avoids generating unnecessary instruction and works more reliably than first inserting them and then deleting them later on. Suggested-by: Johannes Doerfert <doerfert@cs.uni-saarland.de> Differential Revision: http://reviews.llvm.org/D13208 llvm-svn: 248712
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