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| author | Chad Rosier <mcrosier@codeaurora.org> | 2013-11-13 20:05:44 +0000 |
|---|---|---|
| committer | Chad Rosier <mcrosier@codeaurora.org> | 2013-11-13 20:05:44 +0000 |
| commit | e714a962b5ab79ddd42d8c56b7b9531c19abb564 (patch) | |
| tree | 84cdb0037a1b94203180e7af5dcbcefe06450b88 /clang/lib/CodeGen | |
| parent | d3ae5f895ea2941220e5640d1bdd68036c135b6b (diff) | |
| download | bcm5719-llvm-e714a962b5ab79ddd42d8c56b7b9531c19abb564.tar.gz bcm5719-llvm-e714a962b5ab79ddd42d8c56b7b9531c19abb564.zip | |
[AArch64] Tests for legacy AArch32 NEON scalar shift by immediate instructions.
A number of non-overloaded intrinsics have been replaced by thier overloaded
counterparts.
llvm-svn: 194599
Diffstat (limited to 'clang/lib/CodeGen')
| -rw-r--r-- | clang/lib/CodeGen/CGBuiltin.cpp | 18 |
1 files changed, 9 insertions, 9 deletions
diff --git a/clang/lib/CodeGen/CGBuiltin.cpp b/clang/lib/CodeGen/CGBuiltin.cpp index 5ced54360fa..1c62615f815 100644 --- a/clang/lib/CodeGen/CGBuiltin.cpp +++ b/clang/lib/CodeGen/CGBuiltin.cpp @@ -2276,12 +2276,12 @@ static Value *EmitAArch64ScalarBuiltinExpr(CodeGenFunction &CGF, s = "vushr"; OverloadInt = false; break; // Scalar Signed Rounding Shift Right (Immediate) case AArch64::BI__builtin_neon_vrshrd_n_s64: - Int = Intrinsic::aarch64_neon_vrshrds_n; - s = "vsrshr"; OverloadInt = false; break; + Int = Intrinsic::aarch64_neon_vsrshr; + s = "vsrshr"; OverloadInt = true; break; // Scalar Unsigned Rounding Shift Right (Immediate) case AArch64::BI__builtin_neon_vrshrd_n_u64: - Int = Intrinsic::aarch64_neon_vrshrdu_n; - s = "vurshr"; OverloadInt = false; break; + Int = Intrinsic::aarch64_neon_vurshr; + s = "vurshr"; OverloadInt = true; break; // Scalar Signed Shift Right and Accumulate (Immediate) case AArch64::BI__builtin_neon_vsrad_n_s64: Int = Intrinsic::aarch64_neon_vsrads_n; @@ -2322,18 +2322,18 @@ static Value *EmitAArch64ScalarBuiltinExpr(CodeGenFunction &CGF, case AArch64::BI__builtin_neon_vqshluh_n_s16: case AArch64::BI__builtin_neon_vqshlus_n_s32: case AArch64::BI__builtin_neon_vqshlud_n_s64: - Int = Intrinsic::aarch64_neon_vqshlus_n; + Int = Intrinsic::aarch64_neon_vsqshlu; s = "vsqshlu"; OverloadInt = true; break; // Shift Right And Insert (Immediate) case AArch64::BI__builtin_neon_vsrid_n_s64: case AArch64::BI__builtin_neon_vsrid_n_u64: - Int = Intrinsic::aarch64_neon_vsrid_n; - s = "vsri"; OverloadInt = false; break; + Int = Intrinsic::aarch64_neon_vsri; + s = "vsri"; OverloadInt = true; break; // Shift Left And Insert (Immediate) case AArch64::BI__builtin_neon_vslid_n_s64: case AArch64::BI__builtin_neon_vslid_n_u64: - Int = Intrinsic::aarch64_neon_vslid_n; - s = "vsli"; OverloadInt = false; break; + Int = Intrinsic::aarch64_neon_vsli; + s = "vsli"; OverloadInt = true; break; // Signed Saturating Shift Right Narrow (Immediate) case AArch64::BI__builtin_neon_vqshrnh_n_s16: case AArch64::BI__builtin_neon_vqshrns_n_s32: |
