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authorAhmed Bougacha <ahmed.bougacha@gmail.com>2015-06-22 21:31:43 +0000
committerAhmed Bougacha <ahmed.bougacha@gmail.com>2015-06-22 21:31:43 +0000
commit0b938284dac20587ad98536db03b95971bf24f33 (patch)
tree504fd3bed528ac4d9abf590aab86b07305788cc0 /clang/lib/CodeGen
parentd39a4151b35d38a855d8ed0d8243344f6c1b8582 (diff)
downloadbcm5719-llvm-0b938284dac20587ad98536db03b95971bf24f33.tar.gz
bcm5719-llvm-0b938284dac20587ad98536db03b95971bf24f33.zip
[CodeGen] Teach X86_64ABIInfo about AVX512.
As specified in the SysV AVX512 ABI drafts. It follows the same scheme as AVX2: Arguments of type __m512 are split into eight eightbyte chunks. The least significant one belongs to class SSE and all the others to class SSEUP. This also means we change the OpenMP SIMD default alignment on AVX512. Based on r240337. Differential Revision: http://reviews.llvm.org/D9894 llvm-svn: 240338
Diffstat (limited to 'clang/lib/CodeGen')
-rw-r--r--clang/lib/CodeGen/TargetInfo.cpp11
1 files changed, 9 insertions, 2 deletions
diff --git a/clang/lib/CodeGen/TargetInfo.cpp b/clang/lib/CodeGen/TargetInfo.cpp
index ed8f10d7848..d4d0e787096 100644
--- a/clang/lib/CodeGen/TargetInfo.cpp
+++ b/clang/lib/CodeGen/TargetInfo.cpp
@@ -1394,12 +1394,15 @@ namespace {
/// The AVX ABI level for X86 targets.
enum class X86AVXABILevel {
None,
- AVX
+ AVX,
+ AVX512
};
/// \p returns the size in bits of the largest (native) vector for \p AVXLevel.
static unsigned getNativeVectorSizeForAVXABI(X86AVXABILevel AVXLevel) {
switch (AVXLevel) {
+ case X86AVXABILevel::AVX512:
+ return 512;
case X86AVXABILevel::AVX:
return 256;
case X86AVXABILevel::None:
@@ -1956,6 +1959,9 @@ void X86_64ABIInfo::classify(QualType Ty, uint64_t OffsetBase,
// Note that per 3.5.7 of AMD64-ABI, 256-bit args are only passed in
// registers if they are "named", i.e. not part of the "..." of a
// variadic function.
+ //
+ // Similarly, per 3.2.3. of the AVX512 draft, 512-bits ("named") args are
+ // split into eight eightbyte chunks, one SSE and seven SSEUP.
Lo = SSE;
Hi = SSEUp;
}
@@ -7211,7 +7217,8 @@ const TargetCodeGenInfo &CodeGenModule::getTargetCodeGenInfo() {
case llvm::Triple::x86_64: {
StringRef ABI = getTarget().getABI();
- X86AVXABILevel AVXLevel = (ABI == "avx" ? X86AVXABILevel::AVX :
+ X86AVXABILevel AVXLevel = (ABI == "avx512" ? X86AVXABILevel::AVX512 :
+ ABI == "avx" ? X86AVXABILevel::AVX :
X86AVXABILevel::None);
switch (Triple.getOS()) {
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