summaryrefslogtreecommitdiffstats
path: root/clang/lib/CodeGen/CoverageMappingGen.cpp
diff options
context:
space:
mode:
authorSanjay Patel <spatel@rotateright.com>2015-05-05 21:40:38 +0000
committerSanjay Patel <spatel@rotateright.com>2015-05-05 21:40:38 +0000
commit801caff64d2f3eea7b97270855d765c34e102c19 (patch)
tree4dec2f2e4d32c2921918afbda709e7a39f23f467 /clang/lib/CodeGen/CoverageMappingGen.cpp
parentf3343c5b38086d6824a45ecd544d066f60254e1a (diff)
downloadbcm5719-llvm-801caff64d2f3eea7b97270855d765c34e102c19.tar.gz
bcm5719-llvm-801caff64d2f3eea7b97270855d765c34e102c19.zip
propagate IR-level fast-math-flags to DAG nodes (NFC)
This patch adds the minimum plumbing necessary to use IR-level fast-math-flags (FMF) in the backend without actually using them for anything yet. This is a follow-on to: http://reviews.llvm.org/rL235997 ...which split the existing nsw / nuw / exact flags and FMF into their own struct. There are 2 structural changes here: 1. The main diff is that we're preparing to extend the optimization flags to affect more than just binary SDNodes. Eg, IR intrinsics ( https://llvm.org/bugs/show_bug.cgi?id=21290 ) or non-binop nodes that don't even exist in IR such as FMA, FNEG, etc. 2. The other change is that we're actually copying the FP fast-math-flags from the IR instructions to SDNodes. Differential Revision: http://reviews.llvm.org/D8900 llvm-svn: 236546
Diffstat (limited to 'clang/lib/CodeGen/CoverageMappingGen.cpp')
0 files changed, 0 insertions, 0 deletions
OpenPOWER on IntegriCloud