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| author | Eli Friedman <efriedma@quicinc.com> | 2019-12-06 18:05:41 -0800 |
|---|---|---|
| committer | Eli Friedman <efriedma@quicinc.com> | 2019-12-09 15:09:33 -0800 |
| commit | f1ddef34f1c2a38145f855353e5fa0c0e94a7953 (patch) | |
| tree | 356b422d229520325ed674519287bd08503ffb66 /clang/lib/CodeGen/CodeGenModule.h | |
| parent | e6e6e34b95cfe03275943fde0db259cc7d57f4ad (diff) | |
| download | bcm5719-llvm-f1ddef34f1c2a38145f855353e5fa0c0e94a7953.tar.gz bcm5719-llvm-f1ddef34f1c2a38145f855353e5fa0c0e94a7953.zip | |
[AArch64][SVE] Implement SPLAT_VECTOR for i1 vectors.
The generated sequence with whilelo is unintuitive, but it's the best
I could come up with given the limited number of SVE instructions that
interact with scalar registers. The other sequence I was considering
was something like dup+cmpne, but an extra scalar instruction seems
better than an extra vector instruction.
Differential Revision: https://reviews.llvm.org/D71160
Diffstat (limited to 'clang/lib/CodeGen/CodeGenModule.h')
0 files changed, 0 insertions, 0 deletions
