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| author | Craig Topper <craig.topper@gmail.com> | 2019-10-27 17:13:50 -0700 |
|---|---|---|
| committer | Craig Topper <craig.topper@gmail.com> | 2019-10-27 20:44:41 -0700 |
| commit | 7af8d5267b3cf2a41044b04b918db1ae7a8ef32f (patch) | |
| tree | a0589875a73ac14c86c2ae404611762eda6101e9 /clang/lib/CodeGen/CodeGenModule.h | |
| parent | 9b0b626d2c19802bf3d56272cbc3a13d3c9ee5dd (diff) | |
| download | bcm5719-llvm-7af8d5267b3cf2a41044b04b918db1ae7a8ef32f.tar.gz bcm5719-llvm-7af8d5267b3cf2a41044b04b918db1ae7a8ef32f.zip | |
[X86] Use 64-bit version of source register in LowerPATCHABLE_EVENT_CALL and LowerPATCHABLE_TYPED_EVENT_CALL
Summary:
The PATCHABLE_EVENT_CALL uses i32 in the intrinsic. This
results in the register allocator picking a 32-bit register. We
need to use the 64-bit register when forming the MOV64rr
instructions. Otherwise we print illegal assembly in the text
output.
I think prior to this it was impossible for SrcReg to be equal
to DstReg so the NOP code was not reachable.
While there use Register instead of unsigned.
Also add a FIXME for what looks like a bug.
Reviewers: dberris
Reviewed By: dberris
Subscribers: hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D69365
Diffstat (limited to 'clang/lib/CodeGen/CodeGenModule.h')
0 files changed, 0 insertions, 0 deletions
