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authorJack Carter <jack.carter@imgtec.com>2013-04-25 23:31:35 +0000
committerJack Carter <jack.carter@imgtec.com>2013-04-25 23:31:35 +0000
commitc15c1d245bc81f560c0cdaf89ce55d7a6e5a1304 (patch)
treec9682336ec6f06eaefc85f5046b26c8393639ea2 /clang/lib/CodeGen/CodeGenModule.cpp
parentafddaa47198da1f269705fbfb4debcbcc4946a4d (diff)
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Mips assembler: .set reorder support
Mips have delayslots for certain instructions like jumps and branches. These are instructions that follow the branch or jump and are executed before the jump or branch is completed. Early Mips compilers could not cope with delayslots and left them up to the assembler. The assembler would fill the delayslots with the appropriate instruction, usually just a nop to allow correct runtime behavior. The default behavior for this is set with .set reorder. To tell the assembler that you don't want it to mess with the delayslot one used .set noreorder. For backwards compatibility we need to support .set reorder and have it be the default behavior in the assembler. Our support for it is to insert a NOP directly after an instruction with a delayslot when in .set reorder mode. Contributer: Vladimir Medic llvm-svn: 180584
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