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| author | Jack Carter <jcarter@mips.com> | 2013-01-12 01:03:14 +0000 |
|---|---|---|
| committer | Jack Carter <jcarter@mips.com> | 2013-01-12 01:03:14 +0000 |
| commit | 873c724b4a1662ec5468a055758c11b19ad19ee8 (patch) | |
| tree | ebdd46adfaf888b219e68d606b54cbf1ba760095 /clang/lib/CodeGen/CodeGenModule.cpp | |
| parent | d60589ad39a73f8de2f9f0a4e5b78ef7b1a8f8f9 (diff) | |
| download | bcm5719-llvm-873c724b4a1662ec5468a055758c11b19ad19ee8.tar.gz bcm5719-llvm-873c724b4a1662ec5468a055758c11b19ad19ee8.zip | |
This patch tackles the problem of parsing Mips
register names in the standalone assembler llvm-mc.
Registers such as $A1 can represent either a 32 or
64 bit register based on the instruction using it.
In addition, based on the abi, $T0 can represent different
32 bit registers.
The problem is resolved by the Mips specific AsmParser
td definitions changing to work together. Many cases of
RegisterClass parameters are now RegisterOperand.
Contributer: Vladimir Medic
llvm-svn: 172284
Diffstat (limited to 'clang/lib/CodeGen/CodeGenModule.cpp')
0 files changed, 0 insertions, 0 deletions
