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| author | Owen Anderson <resistor@mac.com> | 2011-06-16 18:17:13 +0000 |
|---|---|---|
| committer | Owen Anderson <resistor@mac.com> | 2011-06-16 18:17:13 +0000 |
| commit | 5fc8b77f83d63bce19d39ed2ab002481ccfff9b9 (patch) | |
| tree | d35412de9360e03d1961d4aac2420235a07908ab /clang/lib/CodeGen/CodeGenModule.cpp | |
| parent | 89a7e5ad4528e589d008f7415f5791912a106b44 (diff) | |
| download | bcm5719-llvm-5fc8b77f83d63bce19d39ed2ab002481ccfff9b9.tar.gz bcm5719-llvm-5fc8b77f83d63bce19d39ed2ab002481ccfff9b9.zip | |
Change the REG_SEQUENCE SDNode to take an explict register class ID as its first operand. This operand is lowered away by the time we reach MachineInstrs, so the actual register-allocation handling of them doesn't need to change.
This is intended to support using REG_SEQUENCE SDNode's with type MVT::untyped, and is part of the long road to eliminating some of the hacks we currently use to support register pairs and other strange constraints, particularly on ARM NEON.
llvm-svn: 133178
Diffstat (limited to 'clang/lib/CodeGen/CodeGenModule.cpp')
0 files changed, 0 insertions, 0 deletions
