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authorHal Finkel <hfinkel@anl.gov>2012-11-05 18:18:42 +0000
committerHal Finkel <hfinkel@anl.gov>2012-11-05 18:18:42 +0000
commit4f24c621d97c14740a47635341270c188e5c87ea (patch)
tree4396bdedbf686888628fa8b17ee94c864e68bee7 /clang/lib/CodeGen/CodeGenModule.cpp
parent5f04d84459d0146b8548b16ae4e807b7fda67e6f (diff)
downloadbcm5719-llvm-4f24c621d97c14740a47635341270c188e5c87ea.tar.gz
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Add support for the PowerPC-specific inline asm Z constraint and y modifier.
The Z constraint specifies an r+r memory address, and the y modifier expands to the "r, r" in the asm string. For this initial implementation, the base register is forced to r0 (which has the special meaning of 0 for r+r addressing on PowerPC) and the full address is taken in the second register. In the future, this should be improved. llvm-svn: 167388
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