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authorAkira Hatanaka <ahatanaka@mips.com>2013-07-01 20:31:44 +0000
committerAkira Hatanaka <ahatanaka@mips.com>2013-07-01 20:31:44 +0000
commit263c6af8f3ce7bc8d1e522dbcea5962c22325839 (patch)
tree9b1e41ddea062dbc56bc8a991005b62dfc2e968b /clang/lib/CodeGen/CodeGenModule.cpp
parent7e346a81272224048620c7a8b06f9cdb69ae5f7d (diff)
downloadbcm5719-llvm-263c6af8f3ce7bc8d1e522dbcea5962c22325839.tar.gz
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[mips] Increase the number of floating point control registers available to 32.
Create a dedicated register class for floating point condition code registers and move FCC0 from register class CCR to the new register class. llvm-svn: 185373
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