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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2015-08-22 00:54:31 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2015-08-22 00:54:31 +0000 |
| commit | 0a3ac1be43c32870c4cf0c5894e5e5e8417e5803 (patch) | |
| tree | 794b168511c5b29658e0f768c95a590c3d98afb4 /clang/lib/CodeGen/CodeGenModule.cpp | |
| parent | e8df879948f9da611d88224d87af177ee67be2a7 (diff) | |
| download | bcm5719-llvm-0a3ac1be43c32870c4cf0c5894e5e5e8417e5803.tar.gz bcm5719-llvm-0a3ac1be43c32870c4cf0c5894e5e5e8417e5803.zip | |
AMDGPU: Allow specifying different opcode on VI for SMRD/SMEM
Although the basic s_load_* instructions happen to use the same
opcode, some of the special case SMRD instructions have
different opcodes.
llvm-svn: 245775
Diffstat (limited to 'clang/lib/CodeGen/CodeGenModule.cpp')
0 files changed, 0 insertions, 0 deletions
