diff options
| author | Simon Pilgrim <llvm-dev@redking.me.uk> | 2015-07-27 19:01:52 +0000 |
|---|---|---|
| committer | Simon Pilgrim <llvm-dev@redking.me.uk> | 2015-07-27 19:01:52 +0000 |
| commit | f81966d04bedc6a03b4874c827cf5956639623ea (patch) | |
| tree | 5cd19b5cf9c93cf22fb1fe652cb91e5458d62567 /clang/lib/CodeGen/CodeGenFunction.h | |
| parent | 93d67463a3843530b14b182141a70c0ddd6aa1d4 (diff) | |
| download | bcm5719-llvm-f81966d04bedc6a03b4874c827cf5956639623ea.tar.gz bcm5719-llvm-f81966d04bedc6a03b4874c827cf5956639623ea.zip | |
[X86] Add missing _m_prefetch intrinsic
The 3DNOW/PRFCHW cpu targets define both the PREFETCHW (set cache line modified) and PREFETCH (set cache line exclusive) instructions but only the _m_prefetchw (PREFETCHW) intrinsic is included in the header. This patch adds the missing _m_prefetch intrinsic.
I'm basing this off AMD documentation - the intel docs on the support for PREFETCHW isn't clear whether Silvermont/Broadwell properly support PREFETCH but given that the intrinsic implementation is a default __builtin_prefetch call, it is safe whatever.
Fix for PR23648
Differential Revision: http://reviews.llvm.org/D11338
llvm-svn: 243305
Diffstat (limited to 'clang/lib/CodeGen/CodeGenFunction.h')
0 files changed, 0 insertions, 0 deletions
