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authorCharlie Turner <charlie.turner@arm.com>2015-10-27 17:54:16 +0000
committerCharlie Turner <charlie.turner@arm.com>2015-10-27 17:54:16 +0000
commitcd6e8cf8c250609c7339ef83b3e8844cfbf00966 (patch)
treec34a20c94ef24f45d1e668a78a97e7a3e9c49547 /clang/lib/CodeGen/CodeGenAction.cpp
parent74c387feb7023dae60c760b5e98dcf617466a434 (diff)
downloadbcm5719-llvm-cd6e8cf8c250609c7339ef83b3e8844cfbf00966.tar.gz
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[SLP] Try a bit harder to find reduction PHIs
Summary: Currently, when the SLP vectorizer considers whether a phi is part of a reduction, it dismisses phi's whose incoming blocks are not the same as the block containing the phi. For the patterns I'm looking at, extending this rule to allow phis whose incoming block is a containing loop latch allows me to vectorize certain workloads. There is no significant compile-time impact, and combined with D13949, no performance improvement measured in ARM/AArch64 in any of SPEC2000, SPEC2006 or LNT. Reviewers: jmolloy, mcrosier, nadav Subscribers: mssimpso, nadav, aemerson, llvm-commits Differential Revision: http://reviews.llvm.org/D14063 llvm-svn: 251425
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