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authorKit Barton <kbarton@ca.ibm.com>2015-03-25 19:41:41 +0000
committerKit Barton <kbarton@ca.ibm.com>2015-03-25 19:41:41 +0000
commit8246f28237a56f51e3277116ea1df4dc18aa04db (patch)
treea7b1cfead79d2d78bb55c391876ff2c16813a8d4 /clang/lib/CodeGen/CGDeclCXX.cpp
parent535e69de34835d0b299c273bf889db5434b36054 (diff)
downloadbcm5719-llvm-8246f28237a56f51e3277116ea1df4dc18aa04db.tar.gz
bcm5719-llvm-8246f28237a56f51e3277116ea1df4dc18aa04db.zip
Add Hardware Transactional Memory (HTM) Support
This patch adds Hardware Transaction Memory (HTM) support supported by ISA 2.07 (POWER8). The intrinsic support is based on GCC one [1], with both 'PowerPC HTM Low Level Built-in Functions' and 'PowerPC HTM High Level Inline Functions' implemented. Along with builtins a new driver switch is added to enable/disable HTM instruction support (-mhtm) and a header with common definitions (mostly to parse the TFHAR register value). The HTM switch also sets a preprocessor builtin HTM. The HTM usage requires a recently newer kernel with PPC HTM enabled. Tested on powerpc64 and powerpc64le. This is send along a llvm patch to enabled the builtins and option switch. [1] https://gcc.gnu.org/onlinedocs/gcc/PowerPC-Hardware-Transactional-Memory-Built-in-Functions.html Phabricator Review: http://reviews.llvm.org/D8248 llvm-svn: 233205
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