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| author | Simon Dardis <simon.dardis@imgtec.com> | 2017-10-05 10:27:37 +0000 |
|---|---|---|
| committer | Simon Dardis <simon.dardis@imgtec.com> | 2017-10-05 10:27:37 +0000 |
| commit | 51a7ae2a2936dd686115950871cb599cf47cf089 (patch) | |
| tree | b5662b30e602ab0041638809dac208cd825007b4 /clang/lib/CodeGen/CGClass.cpp | |
| parent | 59428d182f6074363588beaecdacbbd1eb842bb8 (diff) | |
| download | bcm5719-llvm-51a7ae2a2936dd686115950871cb599cf47cf089.tar.gz bcm5719-llvm-51a7ae2a2936dd686115950871cb599cf47cf089.zip | |
[mips] Place certain 64 bit FPU instructions in their own decoder namespace
Previously, instructions that were defined to use the FGR64 register class
were associated with the Mips64 table which was incorrect.
Reviewers: nitesh.jain, atanasyan
Differential Revision: https://reviews.llvm.org/D38454
llvm-svn: 314976
Diffstat (limited to 'clang/lib/CodeGen/CGClass.cpp')
0 files changed, 0 insertions, 0 deletions
