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author | Tomasz Krupa <tomasz.krupa@intel.com> | 2018-06-15 18:05:59 +0000 |
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committer | Tomasz Krupa <tomasz.krupa@intel.com> | 2018-06-15 18:05:59 +0000 |
commit | f1792bb3d6494c936a1d16483cee97688d473ac3 (patch) | |
tree | c42dc0f7f29c08e04a2c5c776de88307c874af1f /clang/lib/CodeGen/CGBuiltin.cpp | |
parent | bcaab53d479e7005ee69e06321bbb493f9b7f5e6 (diff) | |
download | bcm5719-llvm-f1792bb3d6494c936a1d16483cee97688d473ac3.tar.gz bcm5719-llvm-f1792bb3d6494c936a1d16483cee97688d473ac3.zip |
[X86] Lowering sqrt intrinsics to native IR
Reviewers: craig.topper, spatel, RKSimon, igorb, uriel.k
Reviewed By: craig.topper
Subscribers: tkrupa, cfe-commits
Differential Revision: https://reviews.llvm.org/D41168
llvm-svn: 334850
Diffstat (limited to 'clang/lib/CodeGen/CGBuiltin.cpp')
-rw-r--r-- | clang/lib/CodeGen/CGBuiltin.cpp | 51 |
1 files changed, 50 insertions, 1 deletions
diff --git a/clang/lib/CodeGen/CGBuiltin.cpp b/clang/lib/CodeGen/CGBuiltin.cpp index 125eb2031cb..7b0ea22f94e 100644 --- a/clang/lib/CodeGen/CGBuiltin.cpp +++ b/clang/lib/CodeGen/CGBuiltin.cpp @@ -9889,7 +9889,56 @@ Value *CodeGenFunction::EmitX86BuiltinExpr(unsigned BuiltinID, Function *F = CGM.getIntrinsic(Intrinsic::ctlz, Ops[0]->getType()); return Builder.CreateCall(F, {Ops[0],Builder.getInt1(false)}); } - + case X86::BI__builtin_ia32_sqrtss: + case X86::BI__builtin_ia32_sqrtsd: { + Value *A = Builder.CreateExtractElement(Ops[0], (uint64_t)0); + Function *F = CGM.getIntrinsic(Intrinsic::sqrt, A->getType()); + A = Builder.CreateCall(F, {A}); + return Builder.CreateInsertElement(Ops[0], A, (uint64_t)0); + } + case X86::BI__builtin_ia32_sqrtsd_round_mask: + case X86::BI__builtin_ia32_sqrtss_round_mask: { + unsigned CC = cast<llvm::ConstantInt>(Ops[4])->getZExtValue(); + // Support only if the rounding mode is 4 (AKA CUR_DIRECTION), + // otherwise keep the intrinsic. + if (CC != 4) { + Intrinsic::ID IID = BuiltinID == X86::BI__builtin_ia32_sqrtsd_round_mask ? + Intrinsic::x86_avx512_mask_sqrt_sd : + Intrinsic::x86_avx512_mask_sqrt_ss; + return Builder.CreateCall(CGM.getIntrinsic(IID), Ops); + } + Value *A = Builder.CreateExtractElement(Ops[0], (uint64_t)0); + Function *F = CGM.getIntrinsic(Intrinsic::sqrt, A->getType()); + Value *Src = Builder.CreateExtractElement(Ops[2], (uint64_t)0); + int MaskSize = Ops[3]->getType()->getScalarSizeInBits(); + llvm::Type *MaskTy = llvm::VectorType::get(Builder.getInt1Ty(), MaskSize); + Value *Mask = Builder.CreateBitCast(Ops[3], MaskTy); + Mask = Builder.CreateExtractElement(Mask, (uint64_t)0); + A = Builder.CreateSelect(Mask, Builder.CreateCall(F, {A}), Src); + return Builder.CreateInsertElement(Ops[1], A, (uint64_t)0); + } + case X86::BI__builtin_ia32_sqrtpd256: + case X86::BI__builtin_ia32_sqrtpd: + case X86::BI__builtin_ia32_sqrtps256: + case X86::BI__builtin_ia32_sqrtps: { + Function *F = CGM.getIntrinsic(Intrinsic::sqrt, Ops[0]->getType()); + return Builder.CreateCall(F, {Ops[0]}); + } + case X86::BI__builtin_ia32_sqrtps512_mask: + case X86::BI__builtin_ia32_sqrtpd512_mask: { + unsigned CC = cast<llvm::ConstantInt>(Ops[3])->getZExtValue(); + // Support only if the rounding mode is 4 (AKA CUR_DIRECTION), + // otherwise keep the intrinsic. + if (CC != 4) { + Intrinsic::ID IID = BuiltinID == X86::BI__builtin_ia32_sqrtps512_mask ? + Intrinsic::x86_avx512_mask_sqrt_ps_512 : + Intrinsic::x86_avx512_mask_sqrt_pd_512; + return Builder.CreateCall(CGM.getIntrinsic(IID), Ops); + } + Function *F = CGM.getIntrinsic(Intrinsic::sqrt, Ops[0]->getType()); + return EmitX86Select(*this, Ops[2], Builder.CreateCall(F, {Ops[0]}), + Ops[1]); + } case X86::BI__builtin_ia32_pabsb128: case X86::BI__builtin_ia32_pabsw128: case X86::BI__builtin_ia32_pabsd128: |