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| author | Ivan A. Kosarev <ikosarev@accesssoftek.com> | 2018-06-02 17:42:59 +0000 | 
|---|---|---|
| committer | Ivan A. Kosarev <ikosarev@accesssoftek.com> | 2018-06-02 17:42:59 +0000 | 
| commit | 9c40c0ad0ca49a0b4eff20bf85b088daecb0014f (patch) | |
| tree | 6408ec98b812e96bdabe9f68faa99d7ed192ece3 /clang/lib/CodeGen/CGBuiltin.cpp | |
| parent | dda8daec731aae0cbccb22a0d27cb3a12867a30d (diff) | |
| download | bcm5719-llvm-9c40c0ad0ca49a0b4eff20bf85b088daecb0014f.tar.gz bcm5719-llvm-9c40c0ad0ca49a0b4eff20bf85b088daecb0014f.zip | |
[NEON] Support VLD1xN intrinsics in AArch32 mode (Clang part)
We currently support them only in AArch64. The NEON Reference,
however, says they are 'ARMv7, ARMv8' intrinsics.
Differential Revision: https://reviews.llvm.org/D47121
llvm-svn: 333829
Diffstat (limited to 'clang/lib/CodeGen/CGBuiltin.cpp')
| -rw-r--r-- | clang/lib/CodeGen/CGBuiltin.cpp | 57 | 
1 files changed, 27 insertions, 30 deletions
| diff --git a/clang/lib/CodeGen/CGBuiltin.cpp b/clang/lib/CodeGen/CGBuiltin.cpp index b0ef01e63e4..ffcc5ba5fe2 100644 --- a/clang/lib/CodeGen/CGBuiltin.cpp +++ b/clang/lib/CodeGen/CGBuiltin.cpp @@ -3864,8 +3864,14 @@ static const NeonIntrinsicInfo ARMSIMDIntrinsicMap [] = {    NEONMAP2(vhsubq_v, arm_neon_vhsubu, arm_neon_vhsubs, Add1ArgType | UnsignedAlts),    NEONMAP0(vld1_dup_v),    NEONMAP1(vld1_v, arm_neon_vld1, 0), +  NEONMAP1(vld1_x2_v, arm_neon_vld1x2, 0), +  NEONMAP1(vld1_x3_v, arm_neon_vld1x3, 0), +  NEONMAP1(vld1_x4_v, arm_neon_vld1x4, 0),    NEONMAP0(vld1q_dup_v),    NEONMAP1(vld1q_v, arm_neon_vld1, 0), +  NEONMAP1(vld1q_x2_v, arm_neon_vld1x2, 0), +  NEONMAP1(vld1q_x3_v, arm_neon_vld1x3, 0), +  NEONMAP1(vld1q_x4_v, arm_neon_vld1x4, 0),    NEONMAP1(vld2_lane_v, arm_neon_vld2lane, 0),    NEONMAP1(vld2_v, arm_neon_vld2, 0),    NEONMAP1(vld2q_lane_v, arm_neon_vld2lane, 0), @@ -4058,6 +4064,12 @@ static const NeonIntrinsicInfo AArch64SIMDIntrinsicMap[] = {    NEONMAP2(vhaddq_v, aarch64_neon_uhadd, aarch64_neon_shadd, Add1ArgType | UnsignedAlts),    NEONMAP2(vhsub_v, aarch64_neon_uhsub, aarch64_neon_shsub, Add1ArgType | UnsignedAlts),    NEONMAP2(vhsubq_v, aarch64_neon_uhsub, aarch64_neon_shsub, Add1ArgType | UnsignedAlts), +  NEONMAP1(vld1_x2_v, aarch64_neon_ld1x2, 0), +  NEONMAP1(vld1_x3_v, aarch64_neon_ld1x3, 0), +  NEONMAP1(vld1_x4_v, aarch64_neon_ld1x4, 0), +  NEONMAP1(vld1q_x2_v, aarch64_neon_ld1x2, 0), +  NEONMAP1(vld1q_x3_v, aarch64_neon_ld1x3, 0), +  NEONMAP1(vld1q_x4_v, aarch64_neon_ld1x4, 0),    NEONMAP0(vmovl_v),    NEONMAP0(vmovn_v),    NEONMAP1(vmul_v, aarch64_neon_pmul, Add1ArgType), @@ -4726,6 +4738,21 @@ Value *CodeGenFunction::EmitCommonNeonBuiltinExpr(      Ops.push_back(getAlignmentValue32(PtrOp0));      return EmitNeonCall(CGM.getIntrinsic(LLVMIntrinsic, Tys), Ops, "vld1");    } +  case NEON::BI__builtin_neon_vld1_x2_v: +  case NEON::BI__builtin_neon_vld1q_x2_v: +  case NEON::BI__builtin_neon_vld1_x3_v: +  case NEON::BI__builtin_neon_vld1q_x3_v: +  case NEON::BI__builtin_neon_vld1_x4_v: +  case NEON::BI__builtin_neon_vld1q_x4_v: { +    llvm::Type *PTy = llvm::PointerType::getUnqual(VTy->getVectorElementType()); +    Ops[1] = Builder.CreateBitCast(Ops[1], PTy); +    llvm::Type *Tys[2] = { VTy, PTy }; +    Function *F = CGM.getIntrinsic(LLVMIntrinsic, Tys); +    Ops[1] = Builder.CreateCall(F, Ops[1], "vld1xN"); +    Ty = llvm::PointerType::getUnqual(Ops[1]->getType()); +    Ops[0] = Builder.CreateBitCast(Ops[0], Ty); +    return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); +  }    case NEON::BI__builtin_neon_vld2_v:    case NEON::BI__builtin_neon_vld2q_v:    case NEON::BI__builtin_neon_vld3_v: @@ -7843,36 +7870,6 @@ Value *CodeGenFunction::EmitAArch64BuiltinExpr(unsigned BuiltinID,    }      // FIXME: Sharing loads & stores with 32-bit is complicated by the absence      // of an Align parameter here. -  case NEON::BI__builtin_neon_vld1_x2_v: -  case NEON::BI__builtin_neon_vld1q_x2_v: -  case NEON::BI__builtin_neon_vld1_x3_v: -  case NEON::BI__builtin_neon_vld1q_x3_v: -  case NEON::BI__builtin_neon_vld1_x4_v: -  case NEON::BI__builtin_neon_vld1q_x4_v: { -    llvm::Type *PTy = llvm::PointerType::getUnqual(VTy->getVectorElementType()); -    Ops[1] = Builder.CreateBitCast(Ops[1], PTy); -    llvm::Type *Tys[2] = { VTy, PTy }; -    unsigned Int; -    switch (BuiltinID) { -    case NEON::BI__builtin_neon_vld1_x2_v: -    case NEON::BI__builtin_neon_vld1q_x2_v: -      Int = Intrinsic::aarch64_neon_ld1x2; -      break; -    case NEON::BI__builtin_neon_vld1_x3_v: -    case NEON::BI__builtin_neon_vld1q_x3_v: -      Int = Intrinsic::aarch64_neon_ld1x3; -      break; -    case NEON::BI__builtin_neon_vld1_x4_v: -    case NEON::BI__builtin_neon_vld1q_x4_v: -      Int = Intrinsic::aarch64_neon_ld1x4; -      break; -    } -    Function *F = CGM.getIntrinsic(Int, Tys); -    Ops[1] = Builder.CreateCall(F, Ops[1], "vld1xN"); -    Ty = llvm::PointerType::getUnqual(Ops[1]->getType()); -    Ops[0] = Builder.CreateBitCast(Ops[0], Ty); -    return Builder.CreateDefaultAlignedStore(Ops[1], Ops[0]); -  }    case NEON::BI__builtin_neon_vst1_x2_v:    case NEON::BI__builtin_neon_vst1q_x2_v:    case NEON::BI__builtin_neon_vst1_x3_v: | 

