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author | Vedant Kumar <vsk@apple.com> | 2018-08-16 22:24:47 +0000 |
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committer | Vedant Kumar <vsk@apple.com> | 2018-08-16 22:24:47 +0000 |
commit | ee6c233ae045f36f5bb5c7a8d14cfc9d41c634d0 (patch) | |
tree | f743e5d472f7bd629ce33757b8b837644a976f07 /clang/lib/CodeGen/BackendUtil.cpp | |
parent | ada3f77e4420d30e7bf39e215763a66e1ebdbe97 (diff) | |
download | bcm5719-llvm-ee6c233ae045f36f5bb5c7a8d14cfc9d41c634d0.tar.gz bcm5719-llvm-ee6c233ae045f36f5bb5c7a8d14cfc9d41c634d0.zip |
[InstrProf] Use atomic profile counter updates for TSan
Thread sanitizer instrumentation fails to skip all loads and stores to
profile counters. This can happen if profile counter updates are merged:
%.sink = phi i64* ...
%pgocount5 = load i64, i64* %.sink
%27 = add i64 %pgocount5, 1
%28 = bitcast i64* %.sink to i8*
call void @__tsan_write8(i8* %28)
store i64 %27, i64* %.sink
To suppress TSan diagnostics about racy counter updates, make the
counter updates atomic when TSan is enabled. If there's general interest
in this mode it can be surfaced as a clang/swift driver option.
Testing: check-{llvm,clang,profile}
rdar://40477803
Differential Revision: https://reviews.llvm.org/D50867
llvm-svn: 339955
Diffstat (limited to 'clang/lib/CodeGen/BackendUtil.cpp')
-rw-r--r-- | clang/lib/CodeGen/BackendUtil.cpp | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/clang/lib/CodeGen/BackendUtil.cpp b/clang/lib/CodeGen/BackendUtil.cpp index 415bd962622..826ac267c68 100644 --- a/clang/lib/CodeGen/BackendUtil.cpp +++ b/clang/lib/CodeGen/BackendUtil.cpp @@ -653,6 +653,11 @@ void EmitAssemblyHelper::CreatePasses(legacy::PassManager &MPM, InstrProfOptions Options; Options.NoRedZone = CodeGenOpts.DisableRedZone; Options.InstrProfileOutput = CodeGenOpts.InstrProfileOutput; + + // TODO: Surface the option to emit atomic profile counter increments at + // the driver level. + Options.Atomic = LangOpts.Sanitize.has(SanitizerKind::Thread); + MPM.add(createInstrProfilingLegacyPass(Options)); } if (CodeGenOpts.hasProfileIRInstr()) { |