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| author | Will Schmidt <will_schmidt@vnet.ibm.com> | 2014-06-26 13:34:10 +0000 |
|---|---|---|
| committer | Will Schmidt <will_schmidt@vnet.ibm.com> | 2014-06-26 13:34:10 +0000 |
| commit | f048751912afc0bd38a2a1875e3da089d7d26fc2 (patch) | |
| tree | 25461dddd797b6cf7f4690aefd042f8a14899ad8 /clang/lib/Basic/Targets.cpp | |
| parent | 99d4ab2b842ebb8b531e9ff85b54cffb5374db13 (diff) | |
| download | bcm5719-llvm-f048751912afc0bd38a2a1875e3da089d7d26fc2.tar.gz bcm5719-llvm-f048751912afc0bd38a2a1875e3da089d7d26fc2.zip | |
Add ppc64/power8 as a target
llvm-svn: 211778
Diffstat (limited to 'clang/lib/Basic/Targets.cpp')
| -rw-r--r-- | clang/lib/Basic/Targets.cpp | 20 |
1 files changed, 16 insertions, 4 deletions
diff --git a/clang/lib/Basic/Targets.cpp b/clang/lib/Basic/Targets.cpp index a71e8b0ca32..fde4284dfc9 100644 --- a/clang/lib/Basic/Targets.cpp +++ b/clang/lib/Basic/Targets.cpp @@ -706,8 +706,9 @@ public: ArchDefinePwr6 = 1 << 9, ArchDefinePwr6x = 1 << 10, ArchDefinePwr7 = 1 << 11, - ArchDefineA2 = 1 << 12, - ArchDefineA2q = 1 << 13 + ArchDefinePwr8 = 1 << 12, + ArchDefineA2 = 1 << 13, + ArchDefineA2q = 1 << 14 } ArchDefineTypes; // Note: GCC recognizes the following additional cpus: @@ -754,6 +755,8 @@ public: .Case("pwr6x", true) .Case("power7", true) .Case("pwr7", true) + .Case("power8", true) + .Case("pwr8", true) .Case("powerpc", true) .Case("ppc", true) .Case("powerpc64", true) @@ -1016,7 +1019,10 @@ void PPCTargetInfo::getTargetDefines(const LangOptions &Opts, | ArchDefinePpcsq) .Case("pwr7", ArchDefineName | ArchDefinePwr6x | ArchDefinePwr6 | ArchDefinePwr5x | ArchDefinePwr5 | ArchDefinePwr4 - | ArchDefinePwr6 | ArchDefinePpcgr | ArchDefinePpcsq) + | ArchDefinePpcgr | ArchDefinePpcsq) + .Case("pwr8", ArchDefineName | ArchDefinePwr7 | ArchDefinePwr6x + | ArchDefinePwr6 | ArchDefinePwr5x | ArchDefinePwr5 + | ArchDefinePwr4 | ArchDefinePpcgr | ArchDefinePpcsq) .Case("power3", ArchDefinePpcgr) .Case("power4", ArchDefinePwr4 | ArchDefinePpcgr | ArchDefinePpcsq) .Case("power5", ArchDefinePwr5 | ArchDefinePwr4 | ArchDefinePpcgr @@ -1030,7 +1036,10 @@ void PPCTargetInfo::getTargetDefines(const LangOptions &Opts, | ArchDefinePpcsq) .Case("power7", ArchDefinePwr7 | ArchDefinePwr6x | ArchDefinePwr6 | ArchDefinePwr5x | ArchDefinePwr5 | ArchDefinePwr4 - | ArchDefinePwr6 | ArchDefinePpcgr | ArchDefinePpcsq) + | ArchDefinePpcgr | ArchDefinePpcsq) + .Case("power8", ArchDefinePwr8 | ArchDefinePwr7 | ArchDefinePwr6x + | ArchDefinePwr6 | ArchDefinePwr5x | ArchDefinePwr5 + | ArchDefinePwr4 | ArchDefinePpcgr | ArchDefinePpcsq) .Default(ArchDefineNone); if (defs & ArchDefineName) @@ -1057,6 +1066,8 @@ void PPCTargetInfo::getTargetDefines(const LangOptions &Opts, Builder.defineMacro("_ARCH_PWR6X"); if (defs & ArchDefinePwr7) Builder.defineMacro("_ARCH_PWR7"); + if (defs & ArchDefinePwr8) + Builder.defineMacro("_ARCH_PWR8"); if (defs & ArchDefineA2) Builder.defineMacro("_ARCH_A2"); if (defs & ArchDefineA2q) { @@ -1105,6 +1116,7 @@ void PPCTargetInfo::getDefaultFeatures(llvm::StringMap<bool> &Features) const { .Case("g5", true) .Case("pwr6", true) .Case("pwr7", true) + .Case("pwr8", true) .Case("ppc64", true) .Case("ppc64le", true) .Default(false); |
