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authorTim Northover <tnorthover@apple.com>2014-07-09 09:24:43 +0000
committerTim Northover <tnorthover@apple.com>2014-07-09 09:24:43 +0000
commite8c3721165ddedaf3c96ea036bc9728948558a1d (patch)
treea6f3b2add92caf939fb30337a8ce1ee72fe4cbc3 /clang/lib/Basic/Targets.cpp
parentc75e1effed73e1a3f7e9b509634648d71c1dddcf (diff)
downloadbcm5719-llvm-e8c3721165ddedaf3c96ea036bc9728948558a1d.tar.gz
bcm5719-llvm-e8c3721165ddedaf3c96ea036bc9728948558a1d.zip
ARM: use LLVM's atomicrmw instructions when ldrex/strex are available.
Having some kind of weird kernel-assisted ABI for these when the native instructions are available appears to be (and should be) the exception; OSs have been gradually opting in for years and the code was getting silly. So let LLVM decide whether it's possible/profitable to inline them by default. Patch by Phoebe Buckheister. llvm-svn: 212598
Diffstat (limited to 'clang/lib/Basic/Targets.cpp')
-rw-r--r--clang/lib/Basic/Targets.cpp28
1 files changed, 11 insertions, 17 deletions
diff --git a/clang/lib/Basic/Targets.cpp b/clang/lib/Basic/Targets.cpp
index a28436cfe03..f048fa82274 100644
--- a/clang/lib/Basic/Targets.cpp
+++ b/clang/lib/Basic/Targets.cpp
@@ -3475,27 +3475,14 @@ class ARMTargetInfo : public TargetInfo {
static const Builtin::Info BuiltinInfo[];
static bool shouldUseInlineAtomic(const llvm::Triple &T) {
- if (T.isOSWindows())
- return true;
-
- // On linux, binaries targeting old cpus call functions in libgcc to
- // perform atomic operations. The implementation in libgcc then calls into
- // the kernel which on armv6 and newer uses ldrex and strex. The net result
- // is that if we assume the kernel is at least as recent as the hardware,
- // it is safe to use atomic instructions on armv6 and newer.
- if (!T.isOSLinux() &&
- T.getOS() != llvm::Triple::FreeBSD &&
- T.getOS() != llvm::Triple::NetBSD &&
- T.getOS() != llvm::Triple::Bitrig)
- return false;
StringRef ArchName = T.getArchName();
if (T.getArch() == llvm::Triple::arm ||
T.getArch() == llvm::Triple::armeb) {
StringRef VersionStr;
if (ArchName.startswith("armv"))
- VersionStr = ArchName.substr(4);
+ VersionStr = ArchName.substr(4, 1);
else if (ArchName.startswith("armebv"))
- VersionStr = ArchName.substr(6);
+ VersionStr = ArchName.substr(6, 1);
else
return false;
unsigned Version;
@@ -3507,9 +3494,9 @@ class ARMTargetInfo : public TargetInfo {
T.getArch() == llvm::Triple::thumbeb);
StringRef VersionStr;
if (ArchName.startswith("thumbv"))
- VersionStr = ArchName.substr(6);
+ VersionStr = ArchName.substr(6, 1);
else if (ArchName.startswith("thumbebv"))
- VersionStr = ArchName.substr(8);
+ VersionStr = ArchName.substr(8, 1);
else
return false;
unsigned Version;
@@ -3854,6 +3841,13 @@ public:
if (!getCPUDefineSuffix(Name))
return false;
+ // Cortex M does not support 8 byte atomics, while general Thumb2 does.
+ StringRef Profile = getCPUProfile(Name);
+ if (Profile == "M" && MaxAtomicInlineWidth) {
+ MaxAtomicPromoteWidth = 32;
+ MaxAtomicInlineWidth = 32;
+ }
+
CPU = Name;
return true;
}
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