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authorEric Christopher <echristo@gmail.com>2015-06-29 21:00:05 +0000
committerEric Christopher <echristo@gmail.com>2015-06-29 21:00:05 +0000
commitd983270976d24bd30737262f6aafbf362f9077c8 (patch)
tree1afbc51f1b85cce678baaf84a0453986162ed339 /clang/lib/Basic/Targets.cpp
parent63cacd7b7901d2ecf7541f62113c1c2252abbd8c (diff)
downloadbcm5719-llvm-d983270976d24bd30737262f6aafbf362f9077c8.tar.gz
bcm5719-llvm-d983270976d24bd30737262f6aafbf362f9077c8.zip
Add support for the x86 builtin __builtin_cpu_supports.
This matches the implementation of the gcc support for the same feature, including checking the values set up by libgcc at runtime. The structure looks like this: unsigned int __cpu_vendor; unsigned int __cpu_type; unsigned int __cpu_subtype; unsigned int __cpu_features[1]; with a set of enums to match various fields that are field out after parsing the output of the cpuid instruction. This also adds a set of errors checking for valid input (and cpu). compiler-rt support for this and the other builtins in this family (__builtin_cpu_init and __builtin_cpu_is) are forthcoming. llvm-svn: 240994
Diffstat (limited to 'clang/lib/Basic/Targets.cpp')
-rw-r--r--clang/lib/Basic/Targets.cpp28
1 files changed, 28 insertions, 0 deletions
diff --git a/clang/lib/Basic/Targets.cpp b/clang/lib/Basic/Targets.cpp
index 16c678e9588..e496a1f6cd7 100644
--- a/clang/lib/Basic/Targets.cpp
+++ b/clang/lib/Basic/Targets.cpp
@@ -2215,6 +2215,7 @@ public:
Names = AddlRegNames;
NumNames = llvm::array_lengthof(AddlRegNames);
}
+ bool validateCpuSupports(StringRef Name) const override;
bool validateAsmConstraint(const char *&Name,
TargetInfo::ConstraintInfo &info) const override;
@@ -3338,6 +3339,33 @@ bool X86TargetInfo::hasFeature(StringRef Feature) const {
.Default(false);
}
+// We can't use a generic validation scheme for the features accepted here
+// versus subtarget features accepted in the target attribute because the
+// bitfield structure that's initialized in the runtime only supports the
+// below currently rather than the full range of subtarget features. (See
+// X86TargetInfo::hasFeature for a somewhat comprehensive list).
+bool X86TargetInfo::validateCpuSupports(StringRef FeatureStr) const {
+ return llvm::StringSwitch<bool>(FeatureStr)
+ .Case("cmov", true)
+ .Case("mmx", true)
+ .Case("popcnt", true)
+ .Case("sse", true)
+ .Case("sse2", true)
+ .Case("sse3", true)
+ .Case("sse4.1", true)
+ .Case("sse4.2", true)
+ .Case("avx", true)
+ .Case("avx2", true)
+ .Case("sse4a", true)
+ .Case("fma4", true)
+ .Case("xop", true)
+ .Case("fma", true)
+ .Case("avx512f", true)
+ .Case("bmi", true)
+ .Case("bmi2", true)
+ .Default(false);
+}
+
bool
X86TargetInfo::validateAsmConstraint(const char *&Name,
TargetInfo::ConstraintInfo &Info) const {
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