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authorSimon Atanasyan <simon@atanasyan.com>2014-01-27 13:59:04 +0000
committerSimon Atanasyan <simon@atanasyan.com>2014-01-27 13:59:04 +0000
commit1a3665b6766a7c1619216164b0e27bb898cc34bf (patch)
tree5bc9a047da45a78eb09d5d6c10c8cb7a8e704db5 /clang/lib/Basic/Targets.cpp
parent682b49b9ef3b4706e3c601eea9fb63ea7aa840f0 (diff)
downloadbcm5719-llvm-1a3665b6766a7c1619216164b0e27bb898cc34bf.tar.gz
bcm5719-llvm-1a3665b6766a7c1619216164b0e27bb898cc34bf.zip
[Mips] Change default CPU for MIPS 32/64 targets. Now they are mips32r2/mips64r2 respectively.
llvm-svn: 200222
Diffstat (limited to 'clang/lib/Basic/Targets.cpp')
-rw-r--r--clang/lib/Basic/Targets.cpp4
1 files changed, 2 insertions, 2 deletions
diff --git a/clang/lib/Basic/Targets.cpp b/clang/lib/Basic/Targets.cpp
index a3eebc6df9f..6fe7543d89a 100644
--- a/clang/lib/Basic/Targets.cpp
+++ b/clang/lib/Basic/Targets.cpp
@@ -5066,7 +5066,7 @@ const Builtin::Info MipsTargetInfoBase::BuiltinInfo[] = {
class Mips32TargetInfoBase : public MipsTargetInfoBase {
public:
Mips32TargetInfoBase(const llvm::Triple &Triple)
- : MipsTargetInfoBase(Triple, "o32", "mips32") {
+ : MipsTargetInfoBase(Triple, "o32", "mips32r2") {
SizeType = UnsignedInt;
PtrDiffType = SignedInt;
MaxAtomicPromoteWidth = MaxAtomicInlineWidth = 32;
@@ -5173,7 +5173,7 @@ public:
class Mips64TargetInfoBase : public MipsTargetInfoBase {
public:
Mips64TargetInfoBase(const llvm::Triple &Triple)
- : MipsTargetInfoBase(Triple, "n64", "mips64") {
+ : MipsTargetInfoBase(Triple, "n64", "mips64r2") {
LongWidth = LongAlign = 64;
PointerWidth = PointerAlign = 64;
LongDoubleWidth = LongDoubleAlign = 128;
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