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authorAlexey Lapshin <a.v.lapshin@mail.ru>2019-05-22 18:48:58 +0000
committerAlexey Lapshin <a.v.lapshin@mail.ru>2019-05-22 18:48:58 +0000
commit53726588f672a915c6f907569356091552500f23 (patch)
tree35e393c39de8d2ae29521ab34e3dec201dfc17a0 /clang/lib/Basic/FileManager.cpp
parentdfeb7974556921e5c4e0e9768f223698a94dd1fa (diff)
downloadbcm5719-llvm-53726588f672a915c6f907569356091552500f23.tar.gz
bcm5719-llvm-53726588f672a915c6f907569356091552500f23.zip
[DebugInfo][AArch64] Recognise target specific instruction as mov instr
This fix is for the problem from https://bugs.llvm.org/show_bug.cgi?id=38714. Specifically, Simple Register Coalescing creates following conversion : undef %0.sub_32:gpr64 = ORRWrs $wzr, %3:gpr32common, 0, debug-location !24; It copies 32-bit value from gpr32 into gpr64. But Live DEBUG_VALUE analysis is not able to create debug location record for that instruction. So the problem is in that debug info for argc variable is incorrect. The fix is to write custom isCopyInstrImpl() which would recognize the ORRWrs instr. llvm-svn: 361417
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