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author | Sanjay Patel <spatel@rotateright.com> | 2019-04-08 13:58:50 +0000 |
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committer | Sanjay Patel <spatel@rotateright.com> | 2019-04-08 13:58:50 +0000 |
commit | 50c3b290ed8749b568439908adcfca85df33535d (patch) | |
tree | 4aee5a0944bffb43d03a4804f1a720d3d7517381 /clang/lib/AST/ExternalASTMerger.cpp | |
parent | 7671a1daa72a3a48938f5db4a1795762e9ea39d3 (diff) | |
download | bcm5719-llvm-50c3b290ed8749b568439908adcfca85df33535d.tar.gz bcm5719-llvm-50c3b290ed8749b568439908adcfca85df33535d.zip |
[x86] make 8-bit shl undesirable
I was looking at a potential DAGCombiner fix for 1 of the regressions in D60278, and it caused severe regression test pain because x86 TLI lies about the desirability of 8-bit shift ops.
We've hinted at making all 8-bit ops undesirable for the reason in the code comment:
// TODO: Almost no 8-bit ops are desirable because they have no actual
// size/speed advantages vs. 32-bit ops, but they do have a major
// potential disadvantage by causing partial register stalls.
...but that leads to massive diffs and exposes all kinds of optimization holes itself.
Differential Revision: https://reviews.llvm.org/D60286
llvm-svn: 357912
Diffstat (limited to 'clang/lib/AST/ExternalASTMerger.cpp')
0 files changed, 0 insertions, 0 deletions