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| author | Craig Topper <craig.topper@intel.com> | 2018-09-08 19:32:58 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@intel.com> | 2018-09-08 19:32:58 +0000 |
| commit | 7af5e333e7f9ae0a74d86c81babd99006c12a83b (patch) | |
| tree | 99948c2b112cd0265788e8bedb2260ea3d194f40 /clang/lib/AST/Decl.cpp | |
| parent | a2c9694bc8e1f7a2f5356592bfd4b9a42a52f5c8 (diff) | |
| download | bcm5719-llvm-7af5e333e7f9ae0a74d86c81babd99006c12a83b.tar.gz bcm5719-llvm-7af5e333e7f9ae0a74d86c81babd99006c12a83b.zip | |
[X86] Create paddus/psubus from narrower vectors with i8/i16 element types.
Summary:
This patch allows vectors with a power of 2 number of elements and i8/i16 element type to select paddus/psubus instructions. ReplaceNodeResults has been updated to custom widen these operations up to 128 bits like we already do for PAVG.
Another step towards fixing PR38691
Reviewers: RKSimon, spatel
Reviewed By: RKSimon, spatel
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D51818
llvm-svn: 341753
Diffstat (limited to 'clang/lib/AST/Decl.cpp')
0 files changed, 0 insertions, 0 deletions
