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| author | Stepan Dyatkovskiy <stpworld@narod.ru> | 2014-04-03 11:29:15 +0000 |
|---|---|---|
| committer | Stepan Dyatkovskiy <stpworld@narod.ru> | 2014-04-03 11:29:15 +0000 |
| commit | 6207a4dadcd0c050a3a3795d22e67da5efdeb82a (patch) | |
| tree | bb96c3620b8476e83a8fb750661d2ea64b1315ac /clang/INPUTS/all-std-headers.cpp | |
| parent | a3106e6847e4829ca4f5419873a1838ef902c88d (diff) | |
| download | bcm5719-llvm-6207a4dadcd0c050a3a3795d22e67da5efdeb82a.tar.gz bcm5719-llvm-6207a4dadcd0c050a3a3795d22e67da5efdeb82a.zip | |
PR19320:
The trouble as in ARMAsmParser, in ParseInstruction method. It assumes that ARM::R12 + 1 == ARM::SP.
It is wrong, since ARM::<Register> codes are generated by tablegen and actually could be any random numbers.
llvm-svn: 205524
Diffstat (limited to 'clang/INPUTS/all-std-headers.cpp')
0 files changed, 0 insertions, 0 deletions
