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| author | Craig Topper <craig.topper@intel.com> | 2017-08-11 16:20:05 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@intel.com> | 2017-08-11 16:20:05 +0000 |
| commit | 0f30fe963436694837e9ac4c9328c4261f9374bb (patch) | |
| tree | 255da5666bfda693c1c93e133b72bf108a613ccc /clang-tools-extra/test/clang-tidy/hicpp-exception-baseclass.cpp | |
| parent | 9c52574886001d7216ec09bf7363bd62f4706a29 (diff) | |
| download | bcm5719-llvm-0f30fe963436694837e9ac4c9328c4261f9374bb.tar.gz bcm5719-llvm-0f30fe963436694837e9ac4c9328c4261f9374bb.zip | |
[x86] Enable some support for lowerVectorShuffleWithUndefHalf with AVX-512
Summary:
This teaches 512-bit shuffles to detect unused halfs in order to reduce shuffle size.
We may need to refine the 512-bit exit point. I couldn't remember if we had good cross lane shuffles for 8/16 bit with AVX-512 or not.
I believe this is step towards being able to handle D36454 without a special case.
From here we need to improve our ability to combine extract_subvector with insert_subvector and other extract_subvectors. And we need to support narrowing binary operations where we don't demand all elements. This may be improvements to DAGCombiner::narrowExtractedVectorBinOp(by recognizing an insert_subvector in addition to concat) or we may need a target specific combiner.
Reviewers: RKSimon, zvi, delena, jbhateja
Reviewed By: RKSimon, jbhateja
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D36601
llvm-svn: 310724
Diffstat (limited to 'clang-tools-extra/test/clang-tidy/hicpp-exception-baseclass.cpp')
0 files changed, 0 insertions, 0 deletions
