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authorSimon Pilgrim <llvm-dev@redking.me.uk>2017-03-13 21:23:29 +0000
committerSimon Pilgrim <llvm-dev@redking.me.uk>2017-03-13 21:23:29 +0000
commit9df7d08cb28487ab8e69e99507047d07726fcc8f (patch)
tree1fbb7664104bf97289c566eb9a91514d9238201c /clang-tools-extra/test/clang-tidy/cppcoreguidelines-special-member-functions.cpp
parent0f1d32d5571fd485a144bde7831d8cc5497177b4 (diff)
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[X86][MMX] Fix folding of shift value loads to cover whole 64-bits
rL230225 made the assumption that only the lower 32-bits of an MMX register load is used as a shift value, when in fact the whole 64-bits are reloaded and treated as a i64 to determine the shift value. This patch reverts rL230225 to ensure that the whole 64-bits of memory are folded and ensures that the upper 32-bit are zero'd for cases where the shift value has come from a scalar source. Found during fuzz testing. Differential Revision: https://reviews.llvm.org/D30833 llvm-svn: 297667
Diffstat (limited to 'clang-tools-extra/test/clang-tidy/cppcoreguidelines-special-member-functions.cpp')
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