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| author | Sanjay Patel <spatel@rotateright.com> | 2018-02-20 20:53:35 +0000 |
|---|---|---|
| committer | Sanjay Patel <spatel@rotateright.com> | 2018-02-20 20:53:35 +0000 |
| commit | ff7b777bbe621d45aa3705a60a142c3eb84e44db (patch) | |
| tree | a22ec50c36c83aee418ac6cb3a1e7a837134238b | |
| parent | 72f3983633e665dfe9dbee42adedf9601e3dac7a (diff) | |
| download | bcm5719-llvm-ff7b777bbe621d45aa3705a60a142c3eb84e44db.tar.gz bcm5719-llvm-ff7b777bbe621d45aa3705a60a142c3eb84e44db.zip | |
[InstSimplify] add tests for m_SignMask with undef vector elements; NFC
llvm-svn: 325622
| -rw-r--r-- | llvm/test/Transforms/InstSimplify/AndOrXor.ll | 30 |
1 files changed, 28 insertions, 2 deletions
diff --git a/llvm/test/Transforms/InstSimplify/AndOrXor.ll b/llvm/test/Transforms/InstSimplify/AndOrXor.ll index a027c7e1828..55671430c4b 100644 --- a/llvm/test/Transforms/InstSimplify/AndOrXor.ll +++ b/llvm/test/Transforms/InstSimplify/AndOrXor.ll @@ -5,24 +5,50 @@ define <2 x i32> @add_nsw_signbit(<2 x i32> %x) { ; CHECK-LABEL: @add_nsw_signbit( -; CHECK-NEXT: ret <2 x i32> %x +; CHECK-NEXT: ret <2 x i32> [[X:%.*]] ; %y = xor <2 x i32> %x, <i32 -2147483648, i32 -2147483648> %z = add nsw <2 x i32> %y, <i32 -2147483648, i32 -2147483648> ret <2 x i32> %z } +; Undef elements in either constant vector are ok. + +define <2 x i32> @add_nsw_signbit_undef(<2 x i32> %x) { +; CHECK-LABEL: @add_nsw_signbit_undef( +; CHECK-NEXT: [[Y:%.*]] = xor <2 x i32> [[X:%.*]], <i32 undef, i32 -2147483648> +; CHECK-NEXT: [[Z:%.*]] = add nsw <2 x i32> [[Y]], <i32 -2147483648, i32 undef> +; CHECK-NEXT: ret <2 x i32> [[Z]] +; + %y = xor <2 x i32> %x, <i32 undef, i32 -2147483648> + %z = add nsw <2 x i32> %y, <i32 -2147483648, i32 undef> + ret <2 x i32> %z +} + ; add nuw (xor X, signbit), signbit --> X define <2 x i5> @add_nuw_signbit(<2 x i5> %x) { ; CHECK-LABEL: @add_nuw_signbit( -; CHECK-NEXT: ret <2 x i5> %x +; CHECK-NEXT: ret <2 x i5> [[X:%.*]] ; %y = xor <2 x i5> %x, <i5 -16, i5 -16> %z = add nuw <2 x i5> %y, <i5 -16, i5 -16> ret <2 x i5> %z } +; Undef elements in either constant vector are ok. + +define <2 x i5> @add_nuw_signbit_undef(<2 x i5> %x) { +; CHECK-LABEL: @add_nuw_signbit_undef( +; CHECK-NEXT: [[Y:%.*]] = xor <2 x i5> [[X:%.*]], <i5 -16, i5 undef> +; CHECK-NEXT: [[Z:%.*]] = add nuw <2 x i5> [[Y]], <i5 undef, i5 -16> +; CHECK-NEXT: ret <2 x i5> [[Z]] +; + %y = xor <2 x i5> %x, <i5 -16, i5 undef> + %z = add nuw <2 x i5> %y, <i5 undef, i5 -16> + ret <2 x i5> %z +} + define i64 @pow2(i32 %x) { ; CHECK-LABEL: @pow2( ; CHECK-NEXT: [[NEGX:%.*]] = sub i32 0, %x |
