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| author | Konstantin Zhuravlyov <kzhuravl_dev@outlook.com> | 2019-05-28 21:18:34 +0000 |
|---|---|---|
| committer | Konstantin Zhuravlyov <kzhuravl_dev@outlook.com> | 2019-05-28 21:18:34 +0000 |
| commit | fe23ed2c681413e7baf517c79aee9be130579873 (patch) | |
| tree | 93e7fd028e75212807a54211c1e74619bf6dd01f | |
| parent | 14689910737b8e63a0ef7caf407d13aa68bbd6f8 (diff) | |
| download | bcm5719-llvm-fe23ed2c681413e7baf517c79aee9be130579873.tar.gz bcm5719-llvm-fe23ed2c681413e7baf517c79aee9be130579873.zip | |
AMDGPU: Temporary drop s_mul_hi_i/u32 patterns
It introduces performance regressions in several applications.
This has already been submitted downstream.
llvm-svn: 361879
| -rw-r--r-- | llvm/lib/Target/AMDGPU/SOPInstructions.td | 8 | ||||
| -rw-r--r-- | llvm/test/CodeGen/AMDGPU/mul.ll | 5 |
2 files changed, 2 insertions, 11 deletions
diff --git a/llvm/lib/Target/AMDGPU/SOPInstructions.td b/llvm/lib/Target/AMDGPU/SOPInstructions.td index 401a560a683..342293851c3 100644 --- a/llvm/lib/Target/AMDGPU/SOPInstructions.td +++ b/llvm/lib/Target/AMDGPU/SOPInstructions.td @@ -558,12 +558,8 @@ let SubtargetPredicate = isGFX9Plus in { def S_LSHL4_ADD_U32 : SOP2_32<"s_lshl4_add_u32">; } // End Defs = [SCC] - let isCommutable = 1 in { - def S_MUL_HI_U32 : SOP2_32<"s_mul_hi_u32", - [(set i32:$sdst, (UniformBinFrag<mulhu> SSrc_b32:$src0, SSrc_b32:$src1))]>; - def S_MUL_HI_I32 : SOP2_32<"s_mul_hi_i32", - [(set i32:$sdst, (UniformBinFrag<mulhs> SSrc_b32:$src0, SSrc_b32:$src1))]>; - } + def S_MUL_HI_U32 : SOP2_32<"s_mul_hi_u32">; + def S_MUL_HI_I32 : SOP2_32<"s_mul_hi_i32">; } // End SubtargetPredicate = isGFX9Plus //===----------------------------------------------------------------------===// diff --git a/llvm/test/CodeGen/AMDGPU/mul.ll b/llvm/test/CodeGen/AMDGPU/mul.ll index d9d51597891..f8b4ac906c0 100644 --- a/llvm/test/CodeGen/AMDGPU/mul.ll +++ b/llvm/test/CodeGen/AMDGPU/mul.ll @@ -141,11 +141,6 @@ define amdgpu_kernel void @v_mul_i32(i32 addrspace(1)* %out, i32 addrspace(1)* % ; crash with a 'failed to select' error. ; FUNC-LABEL: {{^}}s_mul_i64: -; GFX9_10-DAG: s_mul_i32 -; GFX9_10-DAG: s_mul_hi_u32 -; GFX9_10-DAG: s_mul_i32 -; GFX9_10-DAG: s_mul_i32 -; GFX9_10: s_endpgm define amdgpu_kernel void @s_mul_i64(i64 addrspace(1)* %out, i64 %a, i64 %b) nounwind { %mul = mul i64 %a, %b store i64 %mul, i64 addrspace(1)* %out, align 8 |
