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| author | Craig Topper <craig.topper@intel.com> | 2019-04-14 04:20:38 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@intel.com> | 2019-04-14 04:20:38 +0000 |
| commit | fdcdf74b0e319dcd6cc20f10b46a6cc264d666ba (patch) | |
| tree | 9c256b2801ca141887d0813bfec96933b43e21fd | |
| parent | 0eeb2cd491bdac00dfad1bf78a5a5a6a2e7b1cc5 (diff) | |
| download | bcm5719-llvm-fdcdf74b0e319dcd6cc20f10b46a6cc264d666ba.tar.gz bcm5719-llvm-fdcdf74b0e319dcd6cc20f10b46a6cc264d666ba.zip | |
[X86] Remove some unused tablegen multiclasses. NFC
llvm-svn: 358345
| -rw-r--r-- | llvm/lib/Target/X86/X86InstrAVX512.td | 27 |
1 files changed, 0 insertions, 27 deletions
diff --git a/llvm/lib/Target/X86/X86InstrAVX512.td b/llvm/lib/Target/X86/X86InstrAVX512.td index 47b808a6b62..6e6c8f10c09 100644 --- a/llvm/lib/Target/X86/X86InstrAVX512.td +++ b/llvm/lib/Target/X86/X86InstrAVX512.td @@ -394,33 +394,6 @@ multiclass AVX512_maskable_cmp<bits<8> O, Format F, X86VectorVTInfo _, OpcodeStr, AttSrcAsm, IntelSrcAsm, RHS, (and _.KRCWM:$mask, RHS), IsCommutable>; -multiclass AVX512_maskable_cmp_alt<bits<8> O, Format F, X86VectorVTInfo _, - dag Outs, dag Ins, string OpcodeStr, - string AttSrcAsm, string IntelSrcAsm> : - AVX512_maskable_custom_cmp<O, F, Outs, - Ins, !con((ins _.KRCWM:$mask),Ins), OpcodeStr, - AttSrcAsm, IntelSrcAsm, [], []>; - -// This multiclass generates the unconditional/non-masking, the masking and -// the zero-masking variant of the vector instruction. In the masking case, the -// perserved vector elements come from a new dummy input operand tied to $dst. -multiclass AVX512_maskable_logic<bits<8> O, Format F, X86VectorVTInfo _, - dag Outs, dag Ins, string OpcodeStr, - string AttSrcAsm, string IntelSrcAsm, - dag RHS, dag MaskedRHS, - bit IsCommutable = 0, SDNode Select = vselect> : - AVX512_maskable_custom<O, F, Outs, Ins, - !con((ins _.RC:$src0, _.KRCWM:$mask), Ins), - !con((ins _.KRCWM:$mask), Ins), - OpcodeStr, AttSrcAsm, IntelSrcAsm, - [(set _.RC:$dst, RHS)], - [(set _.RC:$dst, - (Select _.KRCWM:$mask, MaskedRHS, _.RC:$src0))], - [(set _.RC:$dst, - (Select _.KRCWM:$mask, MaskedRHS, - _.ImmAllZerosV))], - "$src0 = $dst", IsCommutable>; - // Alias instruction that maps zero vector to pxor / xorp* for AVX-512. // This is expanded by ExpandPostRAPseudos to an xorps / vxorps, and then |
