diff options
author | Quentin Colombet <qcolombet@apple.com> | 2015-04-10 23:14:34 +0000 |
---|---|---|
committer | Quentin Colombet <qcolombet@apple.com> | 2015-04-10 23:14:34 +0000 |
commit | fd7475b5e89358b725525d95644ba162556cb0a2 (patch) | |
tree | bf14849107807ba3689a313042bdd7ac06d44cb3 | |
parent | 9405ef0e1f3fadbe10baf19dc448e4943f38c93e (diff) | |
download | bcm5719-llvm-fd7475b5e89358b725525d95644ba162556cb0a2.tar.gz bcm5719-llvm-fd7475b5e89358b725525d95644ba162556cb0a2.zip |
[AArch64] Strengthen the code for the prologue insertion.
The spilled registers are pristine and thus, correctly handled by
the register scavenger and so on, but the liveness information is
strictly speaking wrong at this point.
Fix that.
llvm-svn: 234664
-rw-r--r-- | llvm/lib/Target/AArch64/AArch64FrameLowering.cpp | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/llvm/lib/Target/AArch64/AArch64FrameLowering.cpp b/llvm/lib/Target/AArch64/AArch64FrameLowering.cpp index 01716c3cca5..bd2af161210 100644 --- a/llvm/lib/Target/AArch64/AArch64FrameLowering.cpp +++ b/llvm/lib/Target/AArch64/AArch64FrameLowering.cpp @@ -787,6 +787,8 @@ bool AArch64FrameLowering::spillCalleeSavedRegisters( if (StrOpc == AArch64::STPDpre || StrOpc == AArch64::STPXpre) MIB.addReg(AArch64::SP, RegState::Define); + MBB.addLiveIn(Reg1); + MBB.addLiveIn(Reg2); MIB.addReg(Reg2, getPrologueDeath(MF, Reg2)) .addReg(Reg1, getPrologueDeath(MF, Reg1)) .addReg(AArch64::SP) |