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| author | Brian Gaeke <gaeke@uiuc.edu> | 2004-06-18 08:19:08 +0000 |
|---|---|---|
| committer | Brian Gaeke <gaeke@uiuc.edu> | 2004-06-18 08:19:08 +0000 |
| commit | fcc30aca1b0e8ed241f8e56d15372b7a6865e914 (patch) | |
| tree | db5317c04f8e54082d11aaa38a4088ef9540f8cc | |
| parent | b42345811e495e815833bd58c371076733127492 (diff) | |
| download | bcm5719-llvm-fcc30aca1b0e8ed241f8e56d15372b7a6865e914.tar.gz bcm5719-llvm-fcc30aca1b0e8ed241f8e56d15372b7a6865e914.zip | |
Mess around with allocation order. In particular, I think we ought to be
using the local & in regs first because they are not clobbered by calls.
llvm-svn: 14228
| -rw-r--r-- | llvm/lib/Target/SparcV8/SparcV8RegisterInfo.td | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/llvm/lib/Target/SparcV8/SparcV8RegisterInfo.td b/llvm/lib/Target/SparcV8/SparcV8RegisterInfo.td index ca0bcdc171c..d8d130ccf54 100644 --- a/llvm/lib/Target/SparcV8/SparcV8RegisterInfo.td +++ b/llvm/lib/Target/SparcV8/SparcV8RegisterInfo.td @@ -69,10 +69,10 @@ let Namespace = "V8" in { // FIXME: the register order should be defined in terms of the preferred // allocation order... // -def IntRegs : RegisterClass<i32, 8, [G1, G2, G3, G4, G5, G6, G7, - O0, O1, O2, O3, O4, O5, O7, - L0, L1, L2, L3, L4, L5, L6, L7, +def IntRegs : RegisterClass<i32, 8, [L0, L1, L2, L3, L4, L5, L6, L7, I0, I1, I2, I3, I4, I5, + G1, G2, G3, G4, G5, G6, G7, + O0, O1, O2, O3, O4, O5, O7, // Non-allocatable regs O6, I6, I7, G0]> { let Methods = [{ |
