[InstCombine] Cleanup select-bitext.ll tests

Follow-up to r277596.

llvm-svn: 277633

1 files changed, 32 insertions, 72 deletions

diff --git a/llvm/test/Transforms/InstCombine/select-bitext.ll b/llvm/test/Transforms/InstCombine/select-bitext.ll
index 31d24a56946..49069cce854 100644
--- a/llvm/test/Transforms/InstCombine/select-bitext.ll
+++ b/llvm/test/Transforms/InstCombine/select-bitext.ll
@@ -1,122 +1,90 @@
 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
 ; RUN: opt < %s -instcombine -S | FileCheck %s
 
-define i32 @test_sext1(i32 %a, i32 %b) {
+define i32 @test_sext1(i1 %cca, i1 %ccb) {
 ; CHECK-LABEL: @test_sext1(
-; CHECK-NEXT:    [[CCA:%.*]] = icmp sgt i32 %a, 0
-; CHECK-NEXT:    [[CCAX:%.*]] = sext i1 [[CCA]] to i32
-; CHECK-NEXT:    [[CCB:%.*]] = icmp sgt i32 %b, 0
-; CHECK-NEXT:    [[R:%.*]] = select i1 [[CCB]], i32 [[CCAX]], i32 0
+; CHECK-NEXT:    [[CCAX:%.*]] = sext i1 %cca to i32
+; CHECK-NEXT:    [[R:%.*]] = select i1 %ccb, i32 [[CCAX]], i32 0
 ; CHECK-NEXT:    ret i32 [[R]]
 ;
-  %cca = icmp sgt i32 %a, 0
   %ccax = sext i1 %cca to i32
-  %ccb = icmp sgt i32 %b, 0
   %r = select i1 %ccb, i32 %ccax, i32 0
   ret i32 %r
 }
 
-define i32 @test_sext2(i32 %a, i32 %b) {
+define i32 @test_sext2(i1 %cca, i1 %ccb) {
 ; CHECK-LABEL: @test_sext2(
-; CHECK-NEXT:    [[CCA:%.*]] = icmp sgt i32 %a, 0
-; CHECK-NEXT:    [[CCAX:%.*]] = sext i1 [[CCA]] to i32
-; CHECK-NEXT:    [[CCB:%.*]] = icmp sgt i32 %b, 0
-; CHECK-NEXT:    [[R:%.*]] = select i1 [[CCB]], i32 -1, i32 [[CCAX]]
+; CHECK-NEXT:    [[CCAX:%.*]] = sext i1 %cca to i32
+; CHECK-NEXT:    [[R:%.*]] = select i1 %ccb, i32 -1, i32 [[CCAX]]
 ; CHECK-NEXT:    ret i32 [[R]]
 ;
-  %cca = icmp sgt i32 %a, 0
   %ccax = sext i1 %cca to i32
-  %ccb = icmp sgt i32 %b, 0
   %r = select i1 %ccb, i32 -1, i32 %ccax
   ret i32 %r
 }
 
-define i32 @test_sext3(i32 %a, i32 %b) {
+define i32 @test_sext3(i1 %cca, i1 %ccb) {
 ; CHECK-LABEL: @test_sext3(
-; CHECK-NEXT:    [[CCA:%.*]] = icmp sgt i32 %a, 0
-; CHECK-NEXT:    [[CCAX:%.*]] = sext i1 [[CCA]] to i32
-; CHECK-NEXT:    [[CCB:%.*]] = icmp sgt i32 %b, 0
-; CHECK-NEXT:    [[R:%.*]] = select i1 [[CCB]], i32 0, i32 [[CCAX]]
+; CHECK-NEXT:    [[CCAX:%.*]] = sext i1 %cca to i32
+; CHECK-NEXT:    [[R:%.*]] = select i1 %ccb, i32 0, i32 [[CCAX]]
 ; CHECK-NEXT:    ret i32 [[R]]
 ;
-  %cca = icmp sgt i32 %a, 0
   %ccax = sext i1 %cca to i32
-  %ccb = icmp sgt i32 %b, 0
   %r = select i1 %ccb, i32 0, i32 %ccax
   ret i32 %r
 }
 
-define i32 @test_sext4(i32 %a, i32 %b) {
+define i32 @test_sext4(i1 %cca, i1 %ccb) {
 ; CHECK-LABEL: @test_sext4(
-; CHECK-NEXT:    [[CCA:%.*]] = icmp sgt i32 %a, 0
-; CHECK-NEXT:    [[CCAX:%.*]] = sext i1 [[CCA]] to i32
-; CHECK-NEXT:    [[CCB:%.*]] = icmp sgt i32 %b, 0
-; CHECK-NEXT:    [[R:%.*]] = select i1 [[CCB]], i32 [[CCAX]], i32 -1
+; CHECK-NEXT:    [[CCAX:%.*]] = sext i1 %cca to i32
+; CHECK-NEXT:    [[R:%.*]] = select i1 %ccb, i32 [[CCAX]], i32 -1
 ; CHECK-NEXT:    ret i32 [[R]]
 ;
-  %cca = icmp sgt i32 %a, 0
   %ccax = sext i1 %cca to i32
-  %ccb = icmp sgt i32 %b, 0
   %r = select i1 %ccb, i32 %ccax, i32 -1
   ret i32 %r
 }
 
-define i32 @test_zext1(i32 %a, i32 %b) {
+define i32 @test_zext1(i1 %cca, i1 %ccb) {
 ; CHECK-LABEL: @test_zext1(
-; CHECK-NEXT:    [[CCA:%.*]] = icmp sgt i32 %a, 0
-; CHECK-NEXT:    [[CCAX:%.*]] = zext i1 [[CCA]] to i32
-; CHECK-NEXT:    [[CCB:%.*]] = icmp sgt i32 %b, 0
-; CHECK-NEXT:    [[R:%.*]] = select i1 [[CCB]], i32 [[CCAX]], i32 0
+; CHECK-NEXT:    [[CCAX:%.*]] = zext i1 %cca to i32
+; CHECK-NEXT:    [[R:%.*]] = select i1 %ccb, i32 [[CCAX]], i32 0
 ; CHECK-NEXT:    ret i32 [[R]]
 ;
-  %cca = icmp sgt i32 %a, 0
   %ccax = zext i1 %cca to i32
-  %ccb = icmp sgt i32 %b, 0
   %r = select i1 %ccb, i32 %ccax, i32 0
   ret i32 %r
 }
 
-define i32 @test_zext2(i32 %a, i32 %b) {
+define i32 @test_zext2(i1 %cca, i1 %ccb) {
 ; CHECK-LABEL: @test_zext2(
-; CHECK-NEXT:    [[CCA:%.*]] = icmp sgt i32 %a, 0
-; CHECK-NEXT:    [[CCAX:%.*]] = zext i1 [[CCA]] to i32
-; CHECK-NEXT:    [[CCB:%.*]] = icmp sgt i32 %b, 0
-; CHECK-NEXT:    [[R:%.*]] = select i1 [[CCB]], i32 1, i32 [[CCAX]]
+; CHECK-NEXT:    [[CCAX:%.*]] = zext i1 %cca to i32
+; CHECK-NEXT:    [[R:%.*]] = select i1 %ccb, i32 1, i32 [[CCAX]]
 ; CHECK-NEXT:    ret i32 [[R]]
 ;
-  %cca = icmp sgt i32 %a, 0
   %ccax = zext i1 %cca to i32
-  %ccb = icmp sgt i32 %b, 0
   %r = select i1 %ccb, i32 1, i32 %ccax
   ret i32 %r
 }
 
-define i32 @test_zext3(i32 %a, i32 %b) {
+define i32 @test_zext3(i1 %cca, i1 %ccb) {
 ; CHECK-LABEL: @test_zext3(
-; CHECK-NEXT:    [[CCA:%.*]] = icmp sgt i32 %a, 0
-; CHECK-NEXT:    [[CCAX:%.*]] = zext i1 [[CCA]] to i32
-; CHECK-NEXT:    [[CCB:%.*]] = icmp sgt i32 %b, 0
-; CHECK-NEXT:    [[R:%.*]] = select i1 [[CCB]], i32 0, i32 [[CCAX]]
+; CHECK-NEXT:    [[CCAX:%.*]] = zext i1 %cca to i32
+; CHECK-NEXT:    [[R:%.*]] = select i1 %ccb, i32 0, i32 [[CCAX]]
 ; CHECK-NEXT:    ret i32 [[R]]
 ;
-  %cca = icmp sgt i32 %a, 0
   %ccax = zext i1 %cca to i32
-  %ccb = icmp sgt i32 %b, 0
   %r = select i1 %ccb, i32 0, i32 %ccax
   ret i32 %r
 }
 
-define i32 @test_zext4(i32 %a, i32 %b) {
+define i32 @test_zext4(i1 %cca, i1 %ccb) {
 ; CHECK-LABEL: @test_zext4(
-; CHECK-NEXT:    [[CCA:%.*]] = icmp sgt i32 %a, 0
-; CHECK-NEXT:    [[CCAX:%.*]] = zext i1 [[CCA]] to i32
-; CHECK-NEXT:    [[CCB:%.*]] = icmp sgt i32 %b, 0
-; CHECK-NEXT:    [[R:%.*]] = select i1 [[CCB]], i32 [[CCAX]], i32 1
+; CHECK-NEXT:    [[CCAX:%.*]] = zext i1 %cca to i32
+; CHECK-NEXT:    [[R:%.*]] = select i1 %ccb, i32 [[CCAX]], i32 1
 ; CHECK-NEXT:    ret i32 [[R]]
 ;
-  %cca = icmp sgt i32 %a, 0
   %ccax = zext i1 %cca to i32
-  %ccb = icmp sgt i32 %b, 0
   %r = select i1 %ccb, i32 %ccax, i32 1
   ret i32 %r
 }
@@ -183,32 +151,24 @@ define i32 @test_op_op(i32 %a, i32 %b, i32 %c) {
   ret i32 %r
 }
 
-define <2 x i32> @test_no_vectors1(<2 x i32> %a, <2 x i32> %b, <2 x i32> %c) {
-; CHECK-LABEL: @test_no_vectors1(
-; CHECK-NEXT:    [[CCA:%.*]] = icmp sgt <2 x i32> %a, %b
-; CHECK-NEXT:    [[CCAX:%.*]] = sext <2 x i1> [[CCA]] to <2 x i32>
-; CHECK-NEXT:    [[CCB:%.*]] = icmp sgt <2 x i32> %b, %c
-; CHECK-NEXT:    [[R:%.*]] = select <2 x i1> [[CCB]], <2 x i32> [[CCAX]], <2 x i32> zeroinitializer
+define <2 x i32> @test_vectors1(<2 x i1> %cca, <2 x i1> %ccb) {
+; CHECK-LABEL: @test_vectors1(
+; CHECK-NEXT:    [[CCAX:%.*]] = sext <2 x i1> %cca to <2 x i32>
+; CHECK-NEXT:    [[R:%.*]] = select <2 x i1> %ccb, <2 x i32> [[CCAX]], <2 x i32> zeroinitializer
 ; CHECK-NEXT:    ret <2 x i32> [[R]]
 ;
-  %cca = icmp sgt <2 x i32> %a, %b
   %ccax = sext <2 x i1> %cca to <2 x i32>
-  %ccb = icmp sgt <2 x i32> %b, %c
   %r = select <2 x i1> %ccb, <2 x i32> %ccax, <2 x i32> <i32 0, i32 0>
   ret <2 x i32> %r
 }
 
-define <2 x i32> @test_no_vectors2(<2 x i32> %a, <2 x i32> %b, i32 %c) {
-; CHECK-LABEL: @test_no_vectors2(
-; CHECK-NEXT:    [[CCA:%.*]] = icmp sgt <2 x i32> %a, %b
-; CHECK-NEXT:    [[CCAX:%.*]] = sext <2 x i1> [[CCA]] to <2 x i32>
-; CHECK-NEXT:    [[CCB:%.*]] = icmp sgt i32 %c, 0
-; CHECK-NEXT:    [[R:%.*]] = select i1 [[CCB]], <2 x i32> [[CCAX]], <2 x i32> zeroinitializer
+define <2 x i32> @test_vectors2(<2 x i1> %cca, i1 %ccb) {
+; CHECK-LABEL: @test_vectors2(
+; CHECK-NEXT:    [[CCAX:%.*]] = sext <2 x i1> %cca to <2 x i32>
+; CHECK-NEXT:    [[R:%.*]] = select i1 %ccb, <2 x i32> [[CCAX]], <2 x i32> zeroinitializer
 ; CHECK-NEXT:    ret <2 x i32> [[R]]
 ;
-  %cca = icmp sgt <2 x i32> %a, %b
   %ccax = sext <2 x i1> %cca to <2 x i32>
-  %ccb = icmp sgt i32 %c, 0
   %r = select i1 %ccb, <2 x i32> %ccax, <2 x i32> <i32 0, i32 0>
   ret <2 x i32> %r
 }