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| author | Nicolai Haehnle <nhaehnle@gmail.com> | 2018-12-19 12:13:21 +0000 |
|---|---|---|
| committer | Nicolai Haehnle <nhaehnle@gmail.com> | 2018-12-19 12:13:21 +0000 |
| commit | fc2d26857e5b6deeab29552eff410cc765dd2930 (patch) | |
| tree | 8b8f911d752d46db75a4b82583027990e0628c42 | |
| parent | ac62c8a3aab586f1fee2cb379496dbaf63b69cf3 (diff) | |
| download | bcm5719-llvm-fc2d26857e5b6deeab29552eff410cc765dd2930.tar.gz bcm5719-llvm-fc2d26857e5b6deeab29552eff410cc765dd2930.zip | |
Fix test MC/AMDGPU/reloc.s
Missed this change in r349620
Change-Id: I5123e31ed4bb99ad6903b9ede4de4dbe2cc6d453
llvm-svn: 349622
| -rw-r--r-- | llvm/test/MC/AMDGPU/reloc.s | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/llvm/test/MC/AMDGPU/reloc.s b/llvm/test/MC/AMDGPU/reloc.s index 06c44599acc..0a349da49a3 100644 --- a/llvm/test/MC/AMDGPU/reloc.s +++ b/llvm/test/MC/AMDGPU/reloc.s @@ -3,14 +3,14 @@ // CHECK: Relocations [ // CHECK: .rel.text { // CHECK: R_AMDGPU_ABS32_LO SCRATCH_RSRC_DWORD0 0x0 -// CHECK: R_AMDGPU_ABS32_HI SCRATCH_RSRC_DWORD1 0x0 +// CHECK: R_AMDGPU_ABS32_LO SCRATCH_RSRC_DWORD1 0x0 // CHECK: R_AMDGPU_GOTPCREL global_var0 0x0 // CHECK: R_AMDGPU_GOTPCREL32_LO global_var1 0x0 // CHECK: R_AMDGPU_GOTPCREL32_HI global_var2 0x0 // CHECK: R_AMDGPU_REL32_LO global_var3 0x0 // CHECK: R_AMDGPU_REL32_HI global_var4 0x0 // CHECK: R_AMDGPU_ABS32_LO SCRATCH_RSRC_DWORD0 0x0 -// CHECK: R_AMDGPU_ABS32_HI SCRATCH_RSRC_DWORD1 0x0 +// CHECK: R_AMDGPU_ABS32_LO SCRATCH_RSRC_DWORD1 0x0 // CHECK: R_AMDGPU_GOTPCREL global_var0 0x0 // CHECK: R_AMDGPU_GOTPCREL32_LO global_var1 0x0 // CHECK: R_AMDGPU_GOTPCREL32_HI global_var2 0x0 |
