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author | Craig Topper <craig.topper@intel.com> | 2017-11-22 07:11:01 +0000 |
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committer | Craig Topper <craig.topper@intel.com> | 2017-11-22 07:11:01 +0000 |
commit | fb0d4cd48c0a9eada7273dd56a432eec342f6010 (patch) | |
tree | 1be94f265e6ddf374bda188a8d487964e559515f | |
parent | 23044fa63946909ec21dee0cca5f5a50d83f8262 (diff) | |
download | bcm5719-llvm-fb0d4cd48c0a9eada7273dd56a432eec342f6010.tar.gz bcm5719-llvm-fb0d4cd48c0a9eada7273dd56a432eec342f6010.zip |
[SelectionDAG] Add a isel matcher op to check the type of node results other than result 0.
I plan to use this to check the type of the mask result of masked gathers in the X86 backend.
llvm-svn: 318820
-rw-r--r-- | llvm/include/llvm/CodeGen/SelectionDAGISel.h | 1 | ||||
-rw-r--r-- | llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp | 14 | ||||
-rw-r--r-- | llvm/utils/TableGen/DAGISelMatcherEmitter.cpp | 13 |
3 files changed, 23 insertions, 5 deletions
diff --git a/llvm/include/llvm/CodeGen/SelectionDAGISel.h b/llvm/include/llvm/CodeGen/SelectionDAGISel.h index bc14e052c73..053ebaa1dda 100644 --- a/llvm/include/llvm/CodeGen/SelectionDAGISel.h +++ b/llvm/include/llvm/CodeGen/SelectionDAGISel.h @@ -130,6 +130,7 @@ public: OPC_CheckOpcode, OPC_SwitchOpcode, OPC_CheckType, + OPC_CheckTypeRes, OPC_SwitchType, OPC_CheckChild0Type, OPC_CheckChild1Type, OPC_CheckChild2Type, OPC_CheckChild3Type, OPC_CheckChild4Type, OPC_CheckChild5Type, diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp index d74bca1b9c1..cb37137d547 100644 --- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp @@ -2775,6 +2775,12 @@ static unsigned IsPredicateKnownToFail(const unsigned char *Table, Result = !::CheckType(Table, Index, N, SDISel.TLI, SDISel.CurDAG->getDataLayout()); return Index; + case SelectionDAGISel::OPC_CheckTypeRes: { + unsigned Res = Table[Index++]; + Result = !::CheckType(Table, Index, N.getValue(Res), SDISel.TLI, + SDISel.CurDAG->getDataLayout()); + return Index; + } case SelectionDAGISel::OPC_CheckChild0Type: case SelectionDAGISel::OPC_CheckChild1Type: case SelectionDAGISel::OPC_CheckChild2Type: @@ -3177,6 +3183,14 @@ void SelectionDAGISel::SelectCodeCommon(SDNode *NodeToMatch, break; continue; + case OPC_CheckTypeRes: { + unsigned Res = MatcherTable[MatcherIndex++]; + if (!::CheckType(MatcherTable, MatcherIndex, N.getValue(Res), TLI, + CurDAG->getDataLayout())) + break; + continue; + } + case OPC_SwitchOpcode: { unsigned CurNodeOpcode = N.getOpcode(); unsigned SwitchStart = MatcherIndex-1; (void)SwitchStart; diff --git a/llvm/utils/TableGen/DAGISelMatcherEmitter.cpp b/llvm/utils/TableGen/DAGISelMatcherEmitter.cpp index edfc5a19b82..e64943c1d02 100644 --- a/llvm/utils/TableGen/DAGISelMatcherEmitter.cpp +++ b/llvm/utils/TableGen/DAGISelMatcherEmitter.cpp @@ -497,11 +497,14 @@ EmitMatcher(const Matcher *N, unsigned Indent, unsigned CurrentIdx, } case Matcher::CheckType: - assert(cast<CheckTypeMatcher>(N)->getResNo() == 0 && - "FIXME: Add support for CheckType of resno != 0"); - OS << "OPC_CheckType, " - << getEnumName(cast<CheckTypeMatcher>(N)->getType()) << ",\n"; - return 2; + if (cast<CheckTypeMatcher>(N)->getResNo() == 0) { + OS << "OPC_CheckType, " + << getEnumName(cast<CheckTypeMatcher>(N)->getType()) << ",\n"; + return 2; + } + OS << "OPC_CheckTypeRes, " << cast<CheckTypeMatcher>(N)->getResNo() + << ", " << getEnumName(cast<CheckTypeMatcher>(N)->getType()) << ",\n"; + return 3; case Matcher::CheckChildType: OS << "OPC_CheckChild" |