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| author | Sam Parker <sam.parker@arm.com> | 2018-08-15 13:29:50 +0000 |
|---|---|---|
| committer | Sam Parker <sam.parker@arm.com> | 2018-08-15 13:29:50 +0000 |
| commit | fabf7fe5f86db42d9bdc98942c3d522cf5889d53 (patch) | |
| tree | 5cef65e6f74e1bf082eb6740043e1160f15a0620 | |
| parent | 8b4bd09e2276aaa2bf5f074e71c04a911fdf4117 (diff) | |
| download | bcm5719-llvm-fabf7fe5f86db42d9bdc98942c3d522cf5889d53.tar.gz bcm5719-llvm-fabf7fe5f86db42d9bdc98942c3d522cf5889d53.zip | |
[ARM] TypeSize lower bound for ARMCodeGenPrepare
We only try to promote types with are smaller than 16-bits, but we
also need to check that the type is not less than 8-bits.
Differential Revision: https://reviews.llvm.org/D50769
llvm-svn: 339770
| -rw-r--r-- | llvm/lib/Target/ARM/ARMCodeGenPrepare.cpp | 2 | ||||
| -rw-r--r-- | llvm/test/CodeGen/ARM/arm-cgp-icmps.ll | 24 |
2 files changed, 25 insertions, 1 deletions
diff --git a/llvm/lib/Target/ARM/ARMCodeGenPrepare.cpp b/llvm/lib/Target/ARM/ARMCodeGenPrepare.cpp index 3151621ec10..0774b747d75 100644 --- a/llvm/lib/Target/ARM/ARMCodeGenPrepare.cpp +++ b/llvm/lib/Target/ARM/ARMCodeGenPrepare.cpp @@ -562,7 +562,7 @@ bool ARMCodeGenPrepare::isLegalToPromote(Value *V) { bool ARMCodeGenPrepare::TryToPromote(Value *V) { OrigTy = V->getType(); TypeSize = OrigTy->getPrimitiveSizeInBits(); - if (TypeSize > 16) + if (TypeSize > 16 || TypeSize < 8) return false; if (!isSupportedValue(V) || !shouldPromote(V) || !isLegalToPromote(V)) diff --git a/llvm/test/CodeGen/ARM/arm-cgp-icmps.ll b/llvm/test/CodeGen/ARM/arm-cgp-icmps.ll index f3a575983cf..d3a23bdee61 100644 --- a/llvm/test/CodeGen/ARM/arm-cgp-icmps.ll +++ b/llvm/test/CodeGen/ARM/arm-cgp-icmps.ll @@ -256,3 +256,27 @@ define i32 @icmp_not(i16 zeroext %arg0, i16 zeroext %arg1) { ret i32 %res } +; CHECK-COMMON-LABEL: icmp_i1 +; CHECK-NOT: uxt +define i32 @icmp_i1(i1* %arg0, i1 zeroext %arg1, i32 %a, i32 %b) { +entry: + %load = load i1, i1* %arg0 + %not = xor i1 %load, 1 + %cmp = icmp eq i1 %arg1, %not + %res = select i1 %cmp, i32 %a, i32 %b + ret i32 %res +} + +; CHECK-COMMON-LABEL: icmp_i7 +; CHECK-COMMON: ldrb +; CHECK-COMMON: and +; CHECK-COMMON: cmp +define i32 @icmp_i7(i7* %arg0, i7 zeroext %arg1, i32 %a, i32 %b) { +entry: + %load = load i7, i7* %arg0 + %add = add nuw i7 %load, 1 + %cmp = icmp ult i7 %arg1, %add + %res = select i1 %cmp, i32 %a, i32 %b + ret i32 %res +} + |

