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| author | Krzysztof Parzyszek <kparzysz@codeaurora.org> | 2017-04-14 21:17:36 +0000 |
|---|---|---|
| committer | Krzysztof Parzyszek <kparzysz@codeaurora.org> | 2017-04-14 21:17:36 +0000 |
| commit | fabb68fc0621dabe8e551fa813ea7a0b87ca0cdf (patch) | |
| tree | ac18c3643bafccbfc75e4d5d32ea07206235dcdb | |
| parent | fb502d2f5e20eb7bd6fb95c407ff4078a530c0fe (diff) | |
| download | bcm5719-llvm-fabb68fc0621dabe8e551fa813ea7a0b87ca0cdf.tar.gz bcm5719-llvm-fabb68fc0621dabe8e551fa813ea7a0b87ca0cdf.zip | |
[RDF] Correctly enumerate reg units for reg masks
llvm-svn: 300368
| -rw-r--r-- | llvm/lib/Target/Hexagon/RDFRegisters.cpp | 8 |
1 files changed, 5 insertions, 3 deletions
diff --git a/llvm/lib/Target/Hexagon/RDFRegisters.cpp b/llvm/lib/Target/Hexagon/RDFRegisters.cpp index 4e16bad11fb..5c5496a548a 100644 --- a/llvm/lib/Target/Hexagon/RDFRegisters.cpp +++ b/llvm/lib/Target/Hexagon/RDFRegisters.cpp @@ -246,13 +246,15 @@ bool RegisterAggr::hasCoverOf(RegisterRef RR) const { RegisterAggr &RegisterAggr::insert(RegisterRef RR) { if (PhysicalRegisterInfo::isRegMaskId(RR.Reg)) { - // XXX SLOW + BitVector PU(PRI.getTRI().getNumRegUnits()); // Preserved units. const uint32_t *MB = PRI.getRegMaskBits(RR.Reg); for (unsigned i = 1, e = PRI.getTRI().getNumRegs(); i != e; ++i) { - if (MB[i/32] & (1u << (i%32))) + if (!(MB[i/32] & (1u << (i%32)))) continue; - insert(RegisterRef(i, LaneBitmask::getAll())); + for (MCRegUnitIterator U(i, &PRI.getTRI()); U.isValid(); ++U) + PU.set(*U); } + Units |= PU.flip(); return *this; } |
