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author | Daniel Dunbar <daniel@zuster.org> | 2009-05-06 21:56:32 +0000 |
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committer | Daniel Dunbar <daniel@zuster.org> | 2009-05-06 21:56:32 +0000 |
commit | f9d90275f96c0232e7be7f467bb8fca67f803b8f (patch) | |
tree | 816fe1888763bc9788968a45ef9c9edf60036255 | |
parent | bb8d546208f49e08229b4089ca6d7615bb899d74 (diff) | |
download | bcm5719-llvm-f9d90275f96c0232e7be7f467bb8fca67f803b8f.tar.gz bcm5719-llvm-f9d90275f96c0232e7be7f467bb8fca67f803b8f.zip |
Handle -march for the LLVM recognized cpu names.
- x86 target feature handling should not be feature complete, even if
the code quality is lacking.
llvm-svn: 71123
-rw-r--r-- | clang/lib/Basic/Targets.cpp | 45 | ||||
-rw-r--r-- | clang/test/Preprocessor/x86_target_features.c | 10 |
2 files changed, 45 insertions, 10 deletions
diff --git a/clang/lib/Basic/Targets.cpp b/clang/lib/Basic/Targets.cpp index 4e9c3a57a98..0c905d4d0be 100644 --- a/clang/lib/Basic/Targets.cpp +++ b/clang/lib/Basic/Targets.cpp @@ -562,16 +562,41 @@ void X86TargetInfo::getDefaultFeatures(const std::string &CPU, if (PointerWidth == 64) Features["sse2"] = Features["sse"] = Features["mmx"] = true; - // FIXME: LLVM says core2 has SSSE3, but gcc doesn't define - // __SSSE3__ with it? What else is going on here? - if (CPU == "core2") - Features["ssse3"] = Features["sse3"] = Features["sse2"] = Features["sse"] = - Features["mmx"] = true; - else if (CPU == "yonah") - Features["sse3"] = Features["sse2"] = Features["sse"] = - Features["mmx"] = true; - else if (CPU == "pentium4") - Features["sse2"] = Features["sse"] = Features["mmx"] = true; + if (CPU == "generic" || CPU == "i386" || CPU == "i486" || CPU == "i586" || + CPU == "pentium" || CPU == "i686" || CPU == "pentiumpro") + ; + else if (CPU == "pentium-mmx" || CPU == "pentium2") + setFeatureEnabled(Features, "mmx", true); + else if (CPU == "pentium3") + setFeatureEnabled(Features, "sse", true); + else if (CPU == "pentium-m" || CPU == "pentium4" || CPU == "x86-64") + setFeatureEnabled(Features, "sse2", true); + else if (CPU == "yonah" || CPU == "prescott" || CPU == "nocona") + setFeatureEnabled(Features, "sse3", true); + else if (CPU == "core2") + setFeatureEnabled(Features, "ssse3", true); + else if (CPU == "penryn") { + setFeatureEnabled(Features, "sse4", true); + Features["sse42"] = false; + } else if (CPU == "atom") + setFeatureEnabled(Features, "sse3", true); + else if (CPU == "corei7") + setFeatureEnabled(Features, "sse4", true); + else if (CPU == "k6" || CPU == "winchip-c6") + setFeatureEnabled(Features, "mmx", true); + else if (CPU == "k6-2" || CPU == "k6-3" || CPU == "athlon" || + CPU == "athlon-tbird" || CPU == "winchip2" || CPU == "c3") { + setFeatureEnabled(Features, "mmx", true); + setFeatureEnabled(Features, "3dnow", true); + } else if (CPU == "athlon-4" || CPU == "athlon-xp" || CPU == "athlon-mp") { + setFeatureEnabled(Features, "sse", true); + setFeatureEnabled(Features, "3dnowa", true); + } else if (CPU == "k8" || CPU == "opteron" || CPU == "athlon64" || + CPU == "athlon-fx") { + setFeatureEnabled(Features, "sse2", true); + setFeatureEnabled(Features, "3dnowa", true); + } else if (CPU == "c3-2") + setFeatureEnabled(Features, "sse", true); } bool X86TargetInfo::setFeatureEnabled(llvm::StringMap<bool> &Features, diff --git a/clang/test/Preprocessor/x86_target_features.c b/clang/test/Preprocessor/x86_target_features.c index 456c4fcf3a0..90a717b81e8 100644 --- a/clang/test/Preprocessor/x86_target_features.c +++ b/clang/test/Preprocessor/x86_target_features.c @@ -20,6 +20,16 @@ // RUN: grep '#define __SSE__ 1' %t && // RUN: grep '#define __SSSE3__ 1' %t | count 0 && +// RUN: clang -ccc-host-triple i386-unknown-unknown -march=pentium-m -x c -E -dM -o %t %s && +// RUN: grep '#define __SSE2_MATH__ 1' %t && +// RUN: grep '#define __SSE2__ 1' %t && +// RUN: grep '#define __SSE3__ 1' %t | count 0 && +// RUN: grep '#define __SSE4_1__ 1' %t | count 0 && +// RUN: grep '#define __SSE4_2__ 1' %t | count 0 && +// RUN: grep '#define __SSE_MATH__ 1' %t && +// RUN: grep '#define __SSE__ 1' %t && +// RUN: grep '#define __SSSE3__ 1' %t | count 0 && + // RUN: true |